37 	void __iomem		*reg_base;  member
134 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(0));  in rockchip_rk3066_pll_get_params()
140 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(1));  in rockchip_rk3066_pll_get_params()
144 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(2));  in rockchip_rk3066_pll_get_params()
157 	pllcon = readl_relaxed(pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_recalc_rate()
197 	       pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_set_params()
204 	       pll->reg_base + RK3066_PLLCON(0));  in rockchip_rk3066_pll_set_params()
208 		       pll->reg_base + RK3066_PLLCON(1));  in rockchip_rk3066_pll_set_params()
211 		       pll->reg_base + RK3066_PLLCON(2));  in rockchip_rk3066_pll_set_params()
215 	       pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_set_params()
265 	       pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_enable()
276 	       pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_disable()
282 	u32 pllcon = readl(pll->reg_base + RK3066_PLLCON(3));  in rockchip_rk3066_pll_is_enabled()
437 	pll->reg_base = base + con_offset;  in rockchip_clk_register_pll()