Lines Matching refs:rate

52 			    struct rockchip_clk_pll *pll, unsigned long rate)  in rockchip_get_pll_settings()  argument
58 if (rate == rate_table[i].rate) in rockchip_get_pll_settings()
74 if (drate >= rate_table[i].rate) in rockchip_pll_round_rate()
75 return rate_table[i].rate; in rockchip_pll_round_rate()
79 return rate_table[i - 1].rate; in rockchip_pll_round_rate()
130 struct rockchip_pll_rate_table *rate) in rockchip_rk3066_pll_get_params() argument
135 rate->nr = ((pllcon >> RK3066_PLLCON0_NR_SHIFT) in rockchip_rk3066_pll_get_params()
137 rate->no = ((pllcon >> RK3066_PLLCON0_OD_SHIFT) in rockchip_rk3066_pll_get_params()
141 rate->nf = ((pllcon >> RK3066_PLLCON1_NF_SHIFT) in rockchip_rk3066_pll_get_params()
145 rate->nb = ((pllcon >> RK3066_PLLCON2_NB_SHIFT) in rockchip_rk3066_pll_get_params()
174 const struct rockchip_pll_rate_table *rate) in rockchip_rk3066_pll_set_params() argument
184 __func__, rate->rate, rate->nr, rate->no, rate->nf); in rockchip_rk3066_pll_set_params()
187 cur.rate = 0; in rockchip_rk3066_pll_set_params()
200 writel(HIWORD_UPDATE(rate->nr - 1, RK3066_PLLCON0_NR_MASK, in rockchip_rk3066_pll_set_params()
202 HIWORD_UPDATE(rate->no - 1, RK3066_PLLCON0_OD_MASK, in rockchip_rk3066_pll_set_params()
206 writel_relaxed(HIWORD_UPDATE(rate->nf - 1, RK3066_PLLCON1_NF_MASK, in rockchip_rk3066_pll_set_params()
209 writel_relaxed(HIWORD_UPDATE(rate->nb - 1, RK3066_PLLCON2_NB_MASK, in rockchip_rk3066_pll_set_params()
216 udelay(RK3066_PLL_RESET_DELAY(rate->nr)); in rockchip_rk3066_pll_set_params()
236 const struct rockchip_pll_rate_table *rate; in rockchip_rk3066_pll_set_rate() local
250 rate = rockchip_get_pll_settings(pll, drate); in rockchip_rk3066_pll_set_rate()
251 if (!rate) { in rockchip_rk3066_pll_set_rate()
257 return rockchip_rk3066_pll_set_params(pll, rate); in rockchip_rk3066_pll_set_rate()
290 const struct rockchip_pll_rate_table *rate; in rockchip_rk3066_pll_init() local
298 rate = rockchip_get_pll_settings(pll, drate); in rockchip_rk3066_pll_init()
301 if (!rate) in rockchip_rk3066_pll_init()
307 __func__, clk_hw_get_name(hw), drate, rate->nr, cur.nr, in rockchip_rk3066_pll_init()
308 rate->no, cur.no, rate->nf, cur.nf, rate->nb, cur.nb); in rockchip_rk3066_pll_init()
309 if (rate->nr != cur.nr || rate->no != cur.no || rate->nf != cur.nf in rockchip_rk3066_pll_init()
310 || rate->nb != cur.nb) { in rockchip_rk3066_pll_init()
318 rockchip_rk3066_pll_set_params(pll, rate); in rockchip_rk3066_pll_init()
410 for (len = 0; rate_table[len].rate != 0; ) in rockchip_clk_register_pll()