Lines Matching refs:pll_mux
32 struct clk_mux pll_mux; member
177 struct clk_mux *pll_mux = &pll->pll_mux; in rockchip_rk3066_pll_set_params() local
189 cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); in rockchip_rk3066_pll_set_params()
191 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
227 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_params()
353 struct clk_mux *pll_mux; in rockchip_clk_register_pll() local
371 pll_mux = &pll->pll_mux; in rockchip_clk_register_pll()
372 pll_mux->reg = base + mode_offset; in rockchip_clk_register_pll()
373 pll_mux->shift = mode_shift; in rockchip_clk_register_pll()
374 pll_mux->mask = PLL_MODE_MASK; in rockchip_clk_register_pll()
375 pll_mux->flags = 0; in rockchip_clk_register_pll()
376 pll_mux->lock = lock; in rockchip_clk_register_pll()
377 pll_mux->hw.init = &init; in rockchip_clk_register_pll()
380 pll_mux->flags |= CLK_MUX_HIWORD_MASK; in rockchip_clk_register_pll()
393 mux_clk = clk_register(NULL, &pll_mux->hw); in rockchip_clk_register_pll()