336 	.init = rockchip_rk3066_pll_init,
351 	struct clk_init_data init;  in rockchip_clk_register_pll()  local
377 	pll_mux->hw.init = &init;  in rockchip_clk_register_pll()
387 	init.name = name;  in rockchip_clk_register_pll()
388 	init.flags = CLK_SET_RATE_PARENT;  in rockchip_clk_register_pll()
389 	init.ops = pll->pll_mux_ops;  in rockchip_clk_register_pll()
390 	init.parent_names = pll_parents;  in rockchip_clk_register_pll()
391 	init.num_parents = ARRAY_SIZE(pll_parents);  in rockchip_clk_register_pll()
398 	init.name = pll_name;  in rockchip_clk_register_pll()
401 	init.flags = CLK_IGNORE_UNUSED;  in rockchip_clk_register_pll()
403 	init.parent_names = &parent_names[0];  in rockchip_clk_register_pll()
404 	init.num_parents = 1;  in rockchip_clk_register_pll()
426 			init.ops = &rockchip_rk3066_pll_clk_norate_ops;  in rockchip_clk_register_pll()
428 			init.ops = &rockchip_rk3066_pll_clk_ops;  in rockchip_clk_register_pll()
435 	pll->hw.init = &init;  in rockchip_clk_register_pll()