Lines Matching refs:parent_map

50 static const struct parent_map mmcc_xo_mmpll0_mmpll1_gpll0_map[] = {
64 static const struct parent_map mmcc_xo_mmpll0_dsi_hdmi_gpll0_map[] = {
82 static const struct parent_map mmcc_xo_mmpll0_1_2_gpll0_map[] = {
98 static const struct parent_map mmcc_xo_mmpll0_1_3_gpll0_map[] = {
114 static const struct parent_map mmcc_xo_dsi_hdmi_edp_map[] = {
132 static const struct parent_map mmcc_xo_dsi_hdmi_edp_gpll0_map[] = {
150 static const struct parent_map mmcc_xo_dsibyte_hdmi_edp_gpll0_map[] = {
168 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll0_map[] = {
184 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll1_0_map[] = {
202 static const struct parent_map mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map[] = {
327 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
351 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
375 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
394 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
407 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
420 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
433 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
463 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
476 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
504 	.parent_map = mmcc_xo_mmpll0_dsi_hdmi_gpll0_map,
517 	.parent_map = mmcc_xo_mmpll0_1_2_gpll0_map,
539 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
552 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
565 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
579 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
593 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
617 	.parent_map = mmcc_xo_mmpll0_1_3_gpll0_map,
636 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
655 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
679 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map,
693 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_sleep_map,
721 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
735 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
749 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
763 	.parent_map = mmcc_xo_mmpll0_1_4_gpll1_0_map,
782 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
795 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
808 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
831 	.parent_map = mmcc_xo_mmpll0_1_4_gpll0_map,
844 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
857 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
875 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
894 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
914 	.parent_map = mmcc_xo_dsi_hdmi_edp_map,
932 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
945 	.parent_map = mmcc_xo_dsibyte_hdmi_edp_gpll0_map,
963 	.parent_map = mmcc_xo_dsi_hdmi_edp_gpll0_map,
982 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1000 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1018 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1036 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1059 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1081 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,
1100 	.parent_map = mmcc_xo_mmpll0_mmpll1_gpll0_map,