114 static u32 md_to_m(struct mn *mn, u32 md)  in md_to_m()  argument
116 	md >>= mn->m_val_shift;  in md_to_m()
117 	md &= BIT(mn->width) - 1;  in md_to_m()
118 	return md;  in md_to_m()
140 static u32 mn_to_md(struct mn *mn, u32 m, u32 n, u32 md)  in mn_to_md()  argument
146 	md &= ~mask;  in mn_to_md()
150 		md |= m;  in mn_to_md()
151 		md |= ~n & mask_w;  in mn_to_md()
154 	return md;  in mn_to_md()
208 	u32 ns, md, reg;  in configure_bank()  local
241 		ret = regmap_read(rcg->clkr.regmap, md_reg, &md);  in configure_bank()
244 		md = mn_to_md(mn, f->m, f->n, md);  in configure_bank()
245 		ret = regmap_write(rcg->clkr.regmap, md_reg, md);  in configure_bank()
302 	u32 ns, md, reg;  in clk_dyn_rcg_set_parent()  local
314 		regmap_read(rcg->clkr.regmap, rcg->md_reg[bank], &md);  in clk_dyn_rcg_set_parent()
315 		f.m = md_to_m(&rcg->mn[bank], md);  in clk_dyn_rcg_set_parent()
353 	u32 pre_div, m = 0, n = 0, ns, md, mode = 0;  in clk_rcg_recalc_rate()  local
360 		regmap_read(rcg->clkr.regmap, rcg->md_reg, &md);  in clk_rcg_recalc_rate()
361 		m = md_to_m(mn, md);  in clk_rcg_recalc_rate()
378 	u32 m, n, pre_div, ns, md, mode, reg;  in clk_dyn_rcg_recalc_rate()  local
392 		regmap_read(rcg->clkr.regmap, rcg->md_reg[bank], &md);  in clk_dyn_rcg_recalc_rate()
393 		m = md_to_m(mn, md);  in clk_dyn_rcg_recalc_rate()
484 	u32 ns, md, ctl;  in __clk_rcg_set_rate()  local
498 		regmap_read(rcg->clkr.regmap, rcg->md_reg, &md);  in __clk_rcg_set_rate()
499 		md = mn_to_md(mn, f->m, f->n, md);  in __clk_rcg_set_rate()
500 		regmap_write(rcg->clkr.regmap, rcg->md_reg, md);  in __clk_rcg_set_rate()