Lines Matching refs:regmap_update_bits

53 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL,  in clk_pll_enable()
65 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N,  in clk_pll_enable()
74 	return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL,  in clk_pll_enable()
89 	regmap_update_bits(pll->clkr.regmap, pll->mode_reg, mask, 0);  in clk_pll_disable()
172 	regmap_update_bits(pll->clkr.regmap, pll->l_reg, 0x3ff, f->l);  in clk_pll_set_rate()
173 	regmap_update_bits(pll->clkr.regmap, pll->m_reg, 0x7ffff, f->m);  in clk_pll_set_rate()
174 	regmap_update_bits(pll->clkr.regmap, pll->n_reg, 0x7ffff, f->n);  in clk_pll_set_rate()
238 	regmap_update_bits(regmap, pll->mode_reg, PLL_VOTE_FSM_RESET, 0);  in clk_pll_set_fsm_mode()
244 	regmap_update_bits(regmap, pll->mode_reg, mask, val);  in clk_pll_set_fsm_mode()
247 	regmap_update_bits(regmap, pll->mode_reg, PLL_VOTE_FSM_ENA,  in clk_pll_set_fsm_mode()
275 	regmap_update_bits(regmap, pll->config_reg, mask, val);  in clk_pll_configure()
307 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL,  in clk_pll_sr2_enable()
319 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N,  in clk_pll_sr2_enable()
329 	return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL,  in clk_pll_sr2_enable()
352 	regmap_update_bits(pll->clkr.regmap, pll->l_reg, 0x3ff, f->l);  in clk_pll_sr2_set_rate()
353 	regmap_update_bits(pll->clkr.regmap, pll->m_reg, 0x7ffff, f->m);  in clk_pll_sr2_set_rate()
354 	regmap_update_bits(pll->clkr.regmap, pll->n_reg, 0x7ffff, f->n);  in clk_pll_sr2_set_rate()