Lines Matching refs:cpu
37 int cpu; member
57 div = (reg >> (cpuclk->cpu * 8)) & SYS_CTRL_CLK_DIVIDER_MASK; in clk_cpu_recalc_rate()
86 & (~(SYS_CTRL_CLK_DIVIDER_MASK << (cpuclk->cpu * 8)))) in clk_cpu_off_set_rate()
87 | (div << (cpuclk->cpu * 8)); in clk_cpu_off_set_rate()
90 reload_mask = 1 << (20 + cpuclk->cpu); in clk_cpu_off_set_rate()
150 return mvebu_pmsu_dfs_request(cpuclk->cpu); in clk_cpu_on_set_rate()
201 int cpu, err; in of_cpu_clk_setup() local
206 err = of_property_read_u32(dn, "reg", &cpu); in of_cpu_clk_setup()
210 sprintf(clk_name, "cpu%d", cpu); in of_cpu_clk_setup()
212 cpuclk[cpu].parent_name = of_clk_get_parent_name(node, 0); in of_cpu_clk_setup()
213 cpuclk[cpu].clk_name = clk_name; in of_cpu_clk_setup()
214 cpuclk[cpu].cpu = cpu; in of_cpu_clk_setup()
215 cpuclk[cpu].reg_base = clock_complex_base; in of_cpu_clk_setup()
217 cpuclk[cpu].pmu_dfs = pmu_dfs_base + 4 * cpu; in of_cpu_clk_setup()
218 cpuclk[cpu].hw.init = &init; in of_cpu_clk_setup()
220 init.name = cpuclk[cpu].clk_name; in of_cpu_clk_setup()
223 init.parent_names = &cpuclk[cpu].parent_name; in of_cpu_clk_setup()
226 clk = clk_register(NULL, &cpuclk[cpu].hw); in of_cpu_clk_setup()
229 clks[cpu] = clk; in of_cpu_clk_setup()