Lines Matching refs:mux_div
139 u32 mux_div, fc_req; in _set_rate() local
151 mux_div = readl(ri->reg_clk_ctrl); in _set_rate()
153 mux_div = readl(ri->reg_clk_sel); in _set_rate()
158 mux_div &= ~MMP_CLK_BITS_MASK(width, shift); in _set_rate()
159 mux_div |= MMP_CLK_BITS_SET_VAL(div_val, width, shift); in _set_rate()
165 mux_div &= ~MMP_CLK_BITS_MASK(width, shift); in _set_rate()
166 mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift); in _set_rate()
170 writel(mux_div, ri->reg_clk_ctrl); in _set_rate()
172 mux_div |= (1 << ri->bit_fc); in _set_rate()
173 writel(mux_div, ri->reg_clk_ctrl); in _set_rate()
192 writel(mux_div, ri->reg_clk_sel); in _set_rate()
294 u32 mux_div = 0; in mmp_clk_mix_get_parent() local
303 mux_div = readl(ri->reg_clk_ctrl); in mmp_clk_mix_get_parent()
305 mux_div = readl(ri->reg_clk_sel); in mmp_clk_mix_get_parent()
313 mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift); in mmp_clk_mix_get_parent()
324 u32 mux_div = 0; in mmp_clk_mix_recalc_rate() local
333 mux_div = readl(ri->reg_clk_ctrl); in mmp_clk_mix_recalc_rate()
335 mux_div = readl(ri->reg_clk_sel); in mmp_clk_mix_recalc_rate()
343 div = _get_div(mix, MMP_CLK_BITS_GET_VAL(mux_div, width, shift)); in mmp_clk_mix_recalc_rate()