Lines Matching refs:pll_info

83 	const struct ingenic_cgu_pll_info *pll_info;  in ingenic_pll_recalc_rate()  local
91 pll_info = &clk_info->pll; in ingenic_pll_recalc_rate()
94 ctl = readl(cgu->base + pll_info->reg); in ingenic_pll_recalc_rate()
97 m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0); in ingenic_pll_recalc_rate()
98 m += pll_info->m_offset; in ingenic_pll_recalc_rate()
99 n = (ctl >> pll_info->n_shift) & GENMASK(pll_info->n_bits - 1, 0); in ingenic_pll_recalc_rate()
100 n += pll_info->n_offset; in ingenic_pll_recalc_rate()
101 od_enc = ctl >> pll_info->od_shift; in ingenic_pll_recalc_rate()
102 od_enc &= GENMASK(pll_info->od_bits - 1, 0); in ingenic_pll_recalc_rate()
103 bypass = !!(ctl & BIT(pll_info->bypass_bit)); in ingenic_pll_recalc_rate()
104 enable = !!(ctl & BIT(pll_info->enable_bit)); in ingenic_pll_recalc_rate()
112 for (od = 0; od < pll_info->od_max; od++) { in ingenic_pll_recalc_rate()
113 if (pll_info->od_encoding[od] == od_enc) in ingenic_pll_recalc_rate()
116 BUG_ON(od == pll_info->od_max); in ingenic_pll_recalc_rate()
127 const struct ingenic_cgu_pll_info *pll_info; in ingenic_pll_calc() local
130 pll_info = &clk_info->pll; in ingenic_pll_calc()
139 n = max_t(unsigned, n, pll_info->n_offset); in ingenic_pll_calc()
143 m = max_t(unsigned, m, pll_info->m_offset); in ingenic_pll_calc()
177 const struct ingenic_cgu_pll_info *pll_info; in ingenic_pll_set_rate() local
184 pll_info = &clk_info->pll; in ingenic_pll_set_rate()
193 ctl = readl(cgu->base + pll_info->reg); in ingenic_pll_set_rate()
195 ctl &= ~(GENMASK(pll_info->m_bits - 1, 0) << pll_info->m_shift); in ingenic_pll_set_rate()
196 ctl |= (m - pll_info->m_offset) << pll_info->m_shift; in ingenic_pll_set_rate()
198 ctl &= ~(GENMASK(pll_info->n_bits - 1, 0) << pll_info->n_shift); in ingenic_pll_set_rate()
199 ctl |= (n - pll_info->n_offset) << pll_info->n_shift; in ingenic_pll_set_rate()
201 ctl &= ~(GENMASK(pll_info->od_bits - 1, 0) << pll_info->od_shift); in ingenic_pll_set_rate()
202 ctl |= pll_info->od_encoding[od - 1] << pll_info->od_shift; in ingenic_pll_set_rate()
204 ctl &= ~BIT(pll_info->bypass_bit); in ingenic_pll_set_rate()
205 ctl |= BIT(pll_info->enable_bit); in ingenic_pll_set_rate()
207 writel(ctl, cgu->base + pll_info->reg); in ingenic_pll_set_rate()
211 ctl = readl(cgu->base + pll_info->reg); in ingenic_pll_set_rate()
212 if (ctl & BIT(pll_info->stable_bit)) in ingenic_pll_set_rate()