87 	u32 ctl;  in ingenic_pll_recalc_rate()  local
94 	ctl = readl(cgu->base + pll_info->reg);  in ingenic_pll_recalc_rate()
97 	m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0);  in ingenic_pll_recalc_rate()
99 	n = (ctl >> pll_info->n_shift) & GENMASK(pll_info->n_bits - 1, 0);  in ingenic_pll_recalc_rate()
101 	od_enc = ctl >> pll_info->od_shift;  in ingenic_pll_recalc_rate()
103 	bypass = !!(ctl & BIT(pll_info->bypass_bit));  in ingenic_pll_recalc_rate()
104 	enable = !!(ctl & BIT(pll_info->enable_bit));  in ingenic_pll_recalc_rate()
180 	u32 ctl;  in ingenic_pll_set_rate()  local
193 	ctl = readl(cgu->base + pll_info->reg);  in ingenic_pll_set_rate()
195 	ctl &= ~(GENMASK(pll_info->m_bits - 1, 0) << pll_info->m_shift);  in ingenic_pll_set_rate()
196 	ctl |= (m - pll_info->m_offset) << pll_info->m_shift;  in ingenic_pll_set_rate()
198 	ctl &= ~(GENMASK(pll_info->n_bits - 1, 0) << pll_info->n_shift);  in ingenic_pll_set_rate()
199 	ctl |= (n - pll_info->n_offset) << pll_info->n_shift;  in ingenic_pll_set_rate()
201 	ctl &= ~(GENMASK(pll_info->od_bits - 1, 0) << pll_info->od_shift);  in ingenic_pll_set_rate()
202 	ctl |= pll_info->od_encoding[od - 1] << pll_info->od_shift;  in ingenic_pll_set_rate()
204 	ctl &= ~BIT(pll_info->bypass_bit);  in ingenic_pll_set_rate()
205 	ctl |= BIT(pll_info->enable_bit);  in ingenic_pll_set_rate()
207 	writel(ctl, cgu->base + pll_info->reg);  in ingenic_pll_set_rate()
211 		ctl = readl(cgu->base + pll_info->reg);  in ingenic_pll_set_rate()
212 		if (ctl & BIT(pll_info->stable_bit))  in ingenic_pll_set_rate()