69 	ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, ipg,  enumerator
88 	&clk[ipg],
143 	clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);  in _mx35_clocks_init()
267 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.0");  in mx35_clocks_init()
270 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.1");  in mx35_clocks_init()
273 	clk_register_clkdev(clk[ipg], "ipg", "sdhci-esdhc-imx35.2");  in mx35_clocks_init()
278 	clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");  in mx35_clocks_init()
291 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");  in mx35_clocks_init()
293 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.1");  in mx35_clocks_init()
295 	clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.2");  in mx35_clocks_init()
300 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");  in mx35_clocks_init()
303 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.1");  in mx35_clocks_init()
306 	clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");  in mx35_clocks_init()
309 	clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");  in mx35_clocks_init()