124 				unsigned long parent_rate)  in vt8500_dclk_recalc_rate()  argument
137 	return parent_rate / div;  in vt8500_dclk_recalc_rate()
167 				unsigned long parent_rate)  in vt8500_dclk_set_rate()  argument
176 	divisor =  parent_rate / rate;  in vt8500_dclk_set_rate()
358 static void vt8500_find_pll_bits(unsigned long rate, unsigned long parent_rate,  in vt8500_find_pll_bits()  argument
364 	if ((rate < parent_rate * 4) || (rate > parent_rate * 62)) {  in vt8500_find_pll_bits()
370 	if (rate <= parent_rate * 31)  in vt8500_find_pll_bits()
376 	*multiplier = rate / (parent_rate / *prediv);  in vt8500_find_pll_bits()
377 	tclk = (parent_rate / *prediv) * *multiplier;  in vt8500_find_pll_bits()
384 static void wm8650_find_pll_bits(unsigned long rate, unsigned long parent_rate,  in wm8650_find_pll_bits()  argument
397 				tclk = parent_rate * mul / (div1 * (1 << div2));  in wm8650_find_pll_bits()
425 static u32 wm8750_get_filter(u32 parent_rate, u32 divisor1)  in wm8750_get_filter()  argument
428 	u32 freq = (parent_rate / 1000000) / (divisor1 + 1);  in wm8750_get_filter()
452 static void wm8750_find_pll_bits(unsigned long rate, unsigned long parent_rate,  in wm8750_find_pll_bits()  argument
465 				tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2));  in wm8750_find_pll_bits()
471 					*filter = wm8750_get_filter(parent_rate, div1);  in wm8750_find_pll_bits()
490 	*filter = wm8750_get_filter(parent_rate, best_div1);  in wm8750_find_pll_bits()
496 static void wm8850_find_pll_bits(unsigned long rate, unsigned long parent_rate,  in wm8850_find_pll_bits()  argument
509 				tclk = parent_rate * ((mul + 1) * 2) /  in wm8850_find_pll_bits()
540 				unsigned long parent_rate)  in vtwm_pll_set_rate()  argument
551 		vt8500_find_pll_bits(rate, parent_rate, &mul, &div1);  in vtwm_pll_set_rate()
555 		wm8650_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);  in vtwm_pll_set_rate()
559 		wm8750_find_pll_bits(rate, parent_rate, &filter, &mul, &div1, &div2);  in vtwm_pll_set_rate()
563 		wm8850_find_pll_bits(rate, parent_rate, &mul, &div1, &div2);  in vtwm_pll_set_rate()
614 				unsigned long parent_rate)  in vtwm_pll_recalc_rate()  argument
622 		pll_freq = parent_rate * VT8500_PLL_MUL(pll_val);  in vtwm_pll_recalc_rate()
626 		pll_freq = parent_rate * WM8650_PLL_MUL(pll_val);  in vtwm_pll_recalc_rate()
630 		pll_freq = parent_rate * WM8750_PLL_MUL(pll_val);  in vtwm_pll_recalc_rate()
634 		pll_freq = parent_rate * WM8850_PLL_MUL(pll_val);  in vtwm_pll_recalc_rate()