38 	clk[clk_HFXO] = clk_register_fixed_rate(NULL, "HFXO", NULL,  in efm32gg_cmu_init()
41 	clk[clk_HFPERCLKUSART0] = clk_register_gate(NULL, "HFPERCLK.USART0",  in efm32gg_cmu_init()
42 			"HFXO", 0, base + CMU_HFPERCLKEN0, 0, 0, NULL);  in efm32gg_cmu_init()
43 	clk[clk_HFPERCLKUSART1] = clk_register_gate(NULL, "HFPERCLK.USART1",  in efm32gg_cmu_init()
44 			"HFXO", 0, base + CMU_HFPERCLKEN0, 1, 0, NULL);  in efm32gg_cmu_init()
45 	clk[clk_HFPERCLKUSART2] = clk_register_gate(NULL, "HFPERCLK.USART2",  in efm32gg_cmu_init()
46 			"HFXO", 0, base + CMU_HFPERCLKEN0, 2, 0, NULL);  in efm32gg_cmu_init()
47 	clk[clk_HFPERCLKUART0] = clk_register_gate(NULL, "HFPERCLK.UART0",  in efm32gg_cmu_init()
48 			"HFXO", 0, base + CMU_HFPERCLKEN0, 3, 0, NULL);  in efm32gg_cmu_init()
49 	clk[clk_HFPERCLKUART1] = clk_register_gate(NULL, "HFPERCLK.UART1",  in efm32gg_cmu_init()
50 			"HFXO", 0, base + CMU_HFPERCLKEN0, 4, 0, NULL);  in efm32gg_cmu_init()
51 	clk[clk_HFPERCLKTIMER0] = clk_register_gate(NULL, "HFPERCLK.TIMER0",  in efm32gg_cmu_init()
52 			"HFXO", 0, base + CMU_HFPERCLKEN0, 5, 0, NULL);  in efm32gg_cmu_init()
53 	clk[clk_HFPERCLKTIMER1] = clk_register_gate(NULL, "HFPERCLK.TIMER1",  in efm32gg_cmu_init()
54 			"HFXO", 0, base + CMU_HFPERCLKEN0, 6, 0, NULL);  in efm32gg_cmu_init()
55 	clk[clk_HFPERCLKTIMER2] = clk_register_gate(NULL, "HFPERCLK.TIMER2",  in efm32gg_cmu_init()
56 			"HFXO", 0, base + CMU_HFPERCLKEN0, 7, 0, NULL);  in efm32gg_cmu_init()
57 	clk[clk_HFPERCLKTIMER3] = clk_register_gate(NULL, "HFPERCLK.TIMER3",  in efm32gg_cmu_init()
58 			"HFXO", 0, base + CMU_HFPERCLKEN0, 8, 0, NULL);  in efm32gg_cmu_init()
59 	clk[clk_HFPERCLKACMP0] = clk_register_gate(NULL, "HFPERCLK.ACMP0",  in efm32gg_cmu_init()
60 			"HFXO", 0, base + CMU_HFPERCLKEN0, 9, 0, NULL);  in efm32gg_cmu_init()
61 	clk[clk_HFPERCLKACMP1] = clk_register_gate(NULL, "HFPERCLK.ACMP1",  in efm32gg_cmu_init()
62 			"HFXO", 0, base + CMU_HFPERCLKEN0, 10, 0, NULL);  in efm32gg_cmu_init()
63 	clk[clk_HFPERCLKI2C0] = clk_register_gate(NULL, "HFPERCLK.I2C0",  in efm32gg_cmu_init()
64 			"HFXO", 0, base + CMU_HFPERCLKEN0, 11, 0, NULL);  in efm32gg_cmu_init()
65 	clk[clk_HFPERCLKI2C1] = clk_register_gate(NULL, "HFPERCLK.I2C1",  in efm32gg_cmu_init()
66 			"HFXO", 0, base + CMU_HFPERCLKEN0, 12, 0, NULL);  in efm32gg_cmu_init()
67 	clk[clk_HFPERCLKGPIO] = clk_register_gate(NULL, "HFPERCLK.GPIO",  in efm32gg_cmu_init()
68 			"HFXO", 0, base + CMU_HFPERCLKEN0, 13, 0, NULL);  in efm32gg_cmu_init()
69 	clk[clk_HFPERCLKVCMP] = clk_register_gate(NULL, "HFPERCLK.VCMP",  in efm32gg_cmu_init()
70 			"HFXO", 0, base + CMU_HFPERCLKEN0, 14, 0, NULL);  in efm32gg_cmu_init()
71 	clk[clk_HFPERCLKPRS] = clk_register_gate(NULL, "HFPERCLK.PRS",  in efm32gg_cmu_init()
72 			"HFXO", 0, base + CMU_HFPERCLKEN0, 15, 0, NULL);  in efm32gg_cmu_init()
73 	clk[clk_HFPERCLKADC0] = clk_register_gate(NULL, "HFPERCLK.ADC0",  in efm32gg_cmu_init()
74 			"HFXO", 0, base + CMU_HFPERCLKEN0, 16, 0, NULL);  in efm32gg_cmu_init()
75 	clk[clk_HFPERCLKDAC0] = clk_register_gate(NULL, "HFPERCLK.DAC0",  in efm32gg_cmu_init()
76 			"HFXO", 0, base + CMU_HFPERCLKEN0, 17, 0, NULL);  in efm32gg_cmu_init()