Lines Matching refs:reg

79 	u32 reg;  in berlin2_div_is_enabled()  local
84 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_is_enabled()
85 reg >>= map->gate_shift; in berlin2_div_is_enabled()
90 return (reg & 0x1); in berlin2_div_is_enabled()
97 u32 reg; in berlin2_div_enable() local
102 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_enable()
103 reg |= BIT(map->gate_shift); in berlin2_div_enable()
104 writel_relaxed(reg, div->base + map->gate_offs); in berlin2_div_enable()
116 u32 reg; in berlin2_div_disable() local
121 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_disable()
122 reg &= ~BIT(map->gate_shift); in berlin2_div_disable()
123 writel_relaxed(reg, div->base + map->gate_offs); in berlin2_div_disable()
133 u32 reg; in berlin2_div_set_parent() local
139 reg = readl_relaxed(div->base + map->pll_switch_offs); in berlin2_div_set_parent()
141 reg &= ~BIT(map->pll_switch_shift); in berlin2_div_set_parent()
143 reg |= BIT(map->pll_switch_shift); in berlin2_div_set_parent()
144 writel_relaxed(reg, div->base + map->pll_switch_offs); in berlin2_div_set_parent()
148 reg = readl_relaxed(div->base + map->pll_select_offs); in berlin2_div_set_parent()
149 reg &= ~(PLL_SELECT_MASK << map->pll_select_shift); in berlin2_div_set_parent()
150 reg |= (index - 1) << map->pll_select_shift; in berlin2_div_set_parent()
151 writel_relaxed(reg, div->base + map->pll_select_offs); in berlin2_div_set_parent()
164 u32 reg; in berlin2_div_get_parent() local
171 reg = readl_relaxed(div->base + map->pll_switch_offs); in berlin2_div_get_parent()
172 reg &= BIT(map->pll_switch_shift); in berlin2_div_get_parent()
173 if (reg) { in berlin2_div_get_parent()
174 reg = readl_relaxed(div->base + map->pll_select_offs); in berlin2_div_get_parent()
175 reg >>= map->pll_select_shift; in berlin2_div_get_parent()
176 reg &= PLL_SELECT_MASK; in berlin2_div_get_parent()
177 index = 1 + reg; in berlin2_div_get_parent()
209 u32 reg; in berlin2_div_recalc_rate() local
210 reg = readl_relaxed(div->base + map->div_select_offs); in berlin2_div_recalc_rate()
211 reg >>= map->div_select_shift; in berlin2_div_recalc_rate()
212 reg &= DIV_SELECT_MASK; in berlin2_div_recalc_rate()
213 divider = clk_div[reg]; in berlin2_div_recalc_rate()