73 	const struct iproc_clk_ctrl *ctrl;  member
82 	const struct iproc_pll_ctrl *ctrl;  member
128 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in pll_wait_for_lock()  local
131 		u32 val = readl(pll->status_base + ctrl->status.offset);  in pll_wait_for_lock()
133 		if (val & (1 << ctrl->status.shift))  in pll_wait_for_lock()
144 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in iproc_pll_write()  local
148 	if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK &&  in iproc_pll_write()
155 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in __pll_disable()  local
158 	if (ctrl->flags & IPROC_CLK_PLL_ASIU) {  in __pll_disable()
159 		val = readl(pll->asiu_base + ctrl->asiu.offset);  in __pll_disable()
160 		val &= ~(1 << ctrl->asiu.en_shift);  in __pll_disable()
161 		iproc_pll_write(pll, pll->asiu_base, ctrl->asiu.offset, val);  in __pll_disable()
164 	if (ctrl->flags & IPROC_CLK_EMBED_PWRCTRL) {  in __pll_disable()
165 		val = readl(pll->control_base + ctrl->aon.offset);  in __pll_disable()
166 		val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift;  in __pll_disable()
167 		iproc_pll_write(pll, pll->control_base, ctrl->aon.offset, val);  in __pll_disable()
172 		val = readl(pll->pwr_base + ctrl->aon.offset);  in __pll_disable()
173 		val |= 1 << ctrl->aon.iso_shift;  in __pll_disable()
174 		iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val);  in __pll_disable()
177 		val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift);  in __pll_disable()
178 		iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val);  in __pll_disable()
184 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in __pll_enable()  local
187 	if (ctrl->flags & IPROC_CLK_EMBED_PWRCTRL) {  in __pll_enable()
188 		val = readl(pll->control_base + ctrl->aon.offset);  in __pll_enable()
189 		val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift);  in __pll_enable()
190 		iproc_pll_write(pll, pll->control_base, ctrl->aon.offset, val);  in __pll_enable()
195 		val = readl(pll->pwr_base + ctrl->aon.offset);  in __pll_enable()
196 		val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift;  in __pll_enable()
197 		val &= ~(1 << ctrl->aon.iso_shift);  in __pll_enable()
198 		iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val);  in __pll_enable()
202 	if (ctrl->flags & IPROC_CLK_PLL_ASIU) {  in __pll_enable()
203 		val = readl(pll->asiu_base + ctrl->asiu.offset);  in __pll_enable()
204 		val |= (1 << ctrl->asiu.en_shift);  in __pll_enable()
205 		iproc_pll_write(pll, pll->asiu_base, ctrl->asiu.offset, val);  in __pll_enable()
214 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in __pll_put_in_reset()  local
215 	const struct iproc_pll_reset_ctrl *reset = &ctrl->reset;  in __pll_put_in_reset()
226 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in __pll_bring_out_reset()  local
227 	const struct iproc_pll_reset_ctrl *reset = &ctrl->reset;  in __pll_bring_out_reset()
228 	const struct iproc_pll_dig_filter_ctrl *dig_filter = &ctrl->dig_filter;  in __pll_bring_out_reset()
248 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in pll_set_rate()  local
295 	iproc_pll_write(pll, pll->control_base, ctrl->vco_ctrl.u_offset, 0);  in pll_set_rate()
297 	val = readl(pll->control_base + ctrl->vco_ctrl.l_offset);  in pll_set_rate()
307 	iproc_pll_write(pll, pll->control_base, ctrl->vco_ctrl.l_offset, val);  in pll_set_rate()
310 	val = readl(pll->control_base + ctrl->ndiv_int.offset);  in pll_set_rate()
311 	val &= ~(bit_mask(ctrl->ndiv_int.width) << ctrl->ndiv_int.shift);  in pll_set_rate()
312 	val |= vco->ndiv_int << ctrl->ndiv_int.shift;  in pll_set_rate()
313 	iproc_pll_write(pll, pll->control_base, ctrl->ndiv_int.offset, val);  in pll_set_rate()
316 	if (ctrl->flags & IPROC_CLK_PLL_HAS_NDIV_FRAC) {  in pll_set_rate()
317 		val = readl(pll->control_base + ctrl->ndiv_frac.offset);  in pll_set_rate()
318 		val &= ~(bit_mask(ctrl->ndiv_frac.width) <<  in pll_set_rate()
319 			 ctrl->ndiv_frac.shift);  in pll_set_rate()
320 		val |= vco->ndiv_frac << ctrl->ndiv_frac.shift;  in pll_set_rate()
321 		iproc_pll_write(pll, pll->control_base, ctrl->ndiv_frac.offset,  in pll_set_rate()
326 	val = readl(pll->control_base + ctrl->pdiv.offset);  in pll_set_rate()
327 	val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift);  in pll_set_rate()
328 	val |= vco->pdiv << ctrl->pdiv.shift;  in pll_set_rate()
329 	iproc_pll_write(pll, pll->control_base, ctrl->pdiv.offset, val);  in pll_set_rate()
354 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in iproc_pll_disable()  local
356 	if (ctrl->flags & IPROC_CLK_AON)  in iproc_pll_disable()
367 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in iproc_pll_recalc_rate()  local
376 	val = readl(pll->status_base + ctrl->status.offset);  in iproc_pll_recalc_rate()
377 	if ((val & (1 << ctrl->status.shift)) == 0) {  in iproc_pll_recalc_rate()
387 	val = readl(pll->control_base + ctrl->ndiv_int.offset);  in iproc_pll_recalc_rate()
388 	ndiv_int = (val >> ctrl->ndiv_int.shift) &  in iproc_pll_recalc_rate()
389 		bit_mask(ctrl->ndiv_int.width);  in iproc_pll_recalc_rate()
392 	if (ctrl->flags & IPROC_CLK_PLL_HAS_NDIV_FRAC) {  in iproc_pll_recalc_rate()
393 		val = readl(pll->control_base + ctrl->ndiv_frac.offset);  in iproc_pll_recalc_rate()
394 		ndiv_frac = (val >> ctrl->ndiv_frac.shift) &  in iproc_pll_recalc_rate()
395 			bit_mask(ctrl->ndiv_frac.width);  in iproc_pll_recalc_rate()
399 	val = readl(pll->control_base + ctrl->pdiv.offset);  in iproc_pll_recalc_rate()
400 	pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width);  in iproc_pll_recalc_rate()
459 	const struct iproc_clk_ctrl *ctrl = clk->ctrl;  in iproc_clk_enable()  local
464 	val = readl(pll->control_base + ctrl->enable.offset);  in iproc_clk_enable()
465 	val &= ~(1 << ctrl->enable.enable_shift);  in iproc_clk_enable()
466 	iproc_pll_write(pll, pll->control_base, ctrl->enable.offset, val);  in iproc_clk_enable()
469 	val = readl(pll->control_base + ctrl->enable.offset);  in iproc_clk_enable()
470 	val &= ~(1 << ctrl->enable.hold_shift);  in iproc_clk_enable()
471 	iproc_pll_write(pll, pll->control_base, ctrl->enable.offset, val);  in iproc_clk_enable()
479 	const struct iproc_clk_ctrl *ctrl = clk->ctrl;  in iproc_clk_disable()  local
483 	if (ctrl->flags & IPROC_CLK_AON)  in iproc_clk_disable()
486 	val = readl(pll->control_base + ctrl->enable.offset);  in iproc_clk_disable()
487 	val |= 1 << ctrl->enable.enable_shift;  in iproc_clk_disable()
488 	iproc_pll_write(pll, pll->control_base, ctrl->enable.offset, val);  in iproc_clk_disable()
495 	const struct iproc_clk_ctrl *ctrl = clk->ctrl;  in iproc_clk_recalc_rate()  local
503 	val = readl(pll->control_base + ctrl->mdiv.offset);  in iproc_clk_recalc_rate()
504 	mdiv = (val >> ctrl->mdiv.shift) & bit_mask(ctrl->mdiv.width);  in iproc_clk_recalc_rate()
538 	const struct iproc_clk_ctrl *ctrl = clk->ctrl;  in iproc_clk_set_rate()  local
550 	val = readl(pll->control_base + ctrl->mdiv.offset);  in iproc_clk_set_rate()
552 		val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift);  in iproc_clk_set_rate()
554 		val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift);  in iproc_clk_set_rate()
555 		val |= div << ctrl->mdiv.shift;  in iproc_clk_set_rate()
557 	iproc_pll_write(pll, pll->control_base, ctrl->mdiv.offset, val);  in iproc_clk_set_rate()
577 	const struct iproc_pll_ctrl *ctrl = pll->ctrl;  in iproc_pll_sw_cfg()  local
579 	if (ctrl->flags & IPROC_CLK_PLL_NEEDS_SW_CFG) {  in iproc_pll_sw_cfg()
582 		val = readl(pll->control_base + ctrl->sw_ctrl.offset);  in iproc_pll_sw_cfg()
583 		val |= BIT(ctrl->sw_ctrl.shift);  in iproc_pll_sw_cfg()
584 		iproc_pll_write(pll, pll->control_base, ctrl->sw_ctrl.offset,  in iproc_pll_sw_cfg()
645 	pll->ctrl = pll_ctrl;  in iproc_pll_clk_setup()
687 		iclk->ctrl = &clk_ctrl[i];  in iproc_pll_clk_setup()