Lines Matching refs:init
1327 struct clk_init_data init; in bcm2835_register_pll() local
1329 memset(&init, 0, sizeof(init)); in bcm2835_register_pll()
1332 init.parent_names = &cprman->osc_name; in bcm2835_register_pll()
1333 init.num_parents = 1; in bcm2835_register_pll()
1334 init.name = data->name; in bcm2835_register_pll()
1335 init.ops = &bcm2835_pll_clk_ops; in bcm2835_register_pll()
1336 init.flags = CLK_IGNORE_UNUSED; in bcm2835_register_pll()
1344 pll->hw.init = &init; in bcm2835_register_pll()
1354 struct clk_init_data init; in bcm2835_register_pll_divider() local
1367 memset(&init, 0, sizeof(init)); in bcm2835_register_pll_divider()
1369 init.parent_names = &data->source_pll->name; in bcm2835_register_pll_divider()
1370 init.num_parents = 1; in bcm2835_register_pll_divider()
1371 init.name = divider_name; in bcm2835_register_pll_divider()
1372 init.ops = &bcm2835_pll_divider_clk_ops; in bcm2835_register_pll_divider()
1373 init.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED; in bcm2835_register_pll_divider()
1384 divider->div.hw.init = &init; in bcm2835_register_pll_divider()
1413 struct clk_init_data init; in bcm2835_register_clock() local
1450 memset(&init, 0, sizeof(init)); in bcm2835_register_clock()
1451 init.parent_names = &parent; in bcm2835_register_clock()
1452 init.num_parents = 1; in bcm2835_register_clock()
1453 init.name = data->name; in bcm2835_register_clock()
1454 init.flags = CLK_IGNORE_UNUSED; in bcm2835_register_clock()
1457 init.ops = &bcm2835_vpu_clock_clk_ops; in bcm2835_register_clock()
1459 init.ops = &bcm2835_clock_clk_ops; in bcm2835_register_clock()
1460 init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; in bcm2835_register_clock()
1469 clock->hw.init = &init; in bcm2835_register_clock()