Lines Matching refs:MODE
253 #define MODE 0x22 macro
2952 write_reg(info, CHB + MODE, val); in enable_auxclk()
3037 val = read_reg(info, CHA + MODE) | BIT0; in loopback_enable()
3038 write_reg(info, CHA + MODE, val); in loopback_enable()
3095 write_reg(info, CHA + MODE, val); in hdlc_mode()
3288 clear_reg_bits(info, CHA + MODE, BIT3); in rx_stop()
3305 set_reg_bits(info, CHA + MODE, BIT3); in rx_start()
3367 write_reg(info, CHA + MODE, 0); in reset_device()
3368 write_reg(info, CHB + MODE, 0); in reset_device()
3441 write_reg(info, CHA + MODE, val); in async_mode()
3565 set_reg_bits(info, CHA + MODE, BIT3); in async_mode()
3620 val = read_reg(info, CHA + MODE); in set_signals()
3632 write_reg(info, CHA + MODE, val); in set_signals()