962 	unsigned long wp = hw->config_base;  in arm_ccn_pmu_xp_watchpoint_config()  local
969 	hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__WATCHPOINT(wp);  in arm_ccn_pmu_xp_watchpoint_config()
974 			CCN_XP_DT_INTERFACE_SEL__DT_IO_SEL__SHIFT(wp));  in arm_ccn_pmu_xp_watchpoint_config()
976 			CCN_XP_DT_INTERFACE_SEL__DT_IO_SEL__SHIFT(wp);  in arm_ccn_pmu_xp_watchpoint_config()
978 			CCN_XP_DT_INTERFACE_SEL__DT_DEV_SEL__SHIFT(wp));  in arm_ccn_pmu_xp_watchpoint_config()
980 			CCN_XP_DT_INTERFACE_SEL__DT_DEV_SEL__SHIFT(wp);  in arm_ccn_pmu_xp_watchpoint_config()
982 			CCN_XP_DT_INTERFACE_SEL__DT_VC_SEL__SHIFT(wp));  in arm_ccn_pmu_xp_watchpoint_config()
984 			CCN_XP_DT_INTERFACE_SEL__DT_VC_SEL__SHIFT(wp);  in arm_ccn_pmu_xp_watchpoint_config()
988 	writel(cmp_l & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_L(wp));  in arm_ccn_pmu_xp_watchpoint_config()
990 			source->base + CCN_XP_DT_CMP_VAL_L(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
991 	writel(cmp_h & 0xffffffff, source->base + CCN_XP_DT_CMP_VAL_H(wp));  in arm_ccn_pmu_xp_watchpoint_config()
993 			source->base + CCN_XP_DT_CMP_VAL_H(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
996 	writel(mask_l & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_L(wp));  in arm_ccn_pmu_xp_watchpoint_config()
998 			source->base + CCN_XP_DT_CMP_MASK_L(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()
999 	writel(mask_h & 0xffffffff, source->base + CCN_XP_DT_CMP_MASK_H(wp));  in arm_ccn_pmu_xp_watchpoint_config()
1001 			source->base + CCN_XP_DT_CMP_MASK_H(wp) + 4);  in arm_ccn_pmu_xp_watchpoint_config()