Lines Matching refs:pcie2_write32

22 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr);
31 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr); in bcma_core_pcie2_cfg_write()
32 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, val); in bcma_core_pcie2_cfg_write()
52 pcie2_write32(pcie2, (BCMA_CORE_PCIE2_CLK_CONTROL), val); in bcma_core_pcie2_war_delay_perst_enab()
60 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x844); in bcma_core_pcie2_set_ltr_vals()
61 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x883c883c); in bcma_core_pcie2_set_ltr_vals()
63 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x848); in bcma_core_pcie2_set_ltr_vals()
64 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x88648864); in bcma_core_pcie2_set_ltr_vals()
66 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x84C); in bcma_core_pcie2_set_ltr_vals()
67 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x90039003); in bcma_core_pcie2_set_ltr_vals()
78 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, in bcma_core_pcie2_hw_ltr_war()
90 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, in bcma_core_pcie2_hw_ltr_war()
92 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, devstsctr2); in bcma_core_pcie2_hw_ltr_war()
95 pcie2_write32(pcie2, BCMA_CORE_PCIE2_LTR_STATE, in bcma_core_pcie2_hw_ltr_war()
100 pcie2_write32(pcie2, BCMA_CORE_PCIE2_LTR_STATE, in bcma_core_pcie2_hw_ltr_war()
123 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, in pciedev_crwlpciegen2()
133 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, PCIE2_PMCR_REFUP); in pciedev_crwlpciegen2_180()
139 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, PCIE2_SBMBX); in pciedev_crwlpciegen2_182()
140 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 1 << 0); in pciedev_crwlpciegen2_182()
152 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, in pciedev_reg_pm_clk_period()
154 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, pm_value); in pciedev_reg_pm_clk_period()