82 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu2_pll_init0()  local
86 	switch (bus->chipinfo.id) {  in bcma_pmu2_pll_init0()
110 		bcma_err(bus, "Unknown TGT frequency for xtalfreq %d\n",  in bcma_pmu2_pll_init0()
120 		bcma_debug(bus, "Target TGT frequency already set\n");  in bcma_pmu2_pll_init0()
125 	switch (bus->chipinfo.id) {  in bcma_pmu2_pll_init0()
150 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu_pll_init()  local
153 	switch (bus->chipinfo.id) {  in bcma_pmu_pll_init()
164 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu_resources_init()  local
167 	switch (bus->chipinfo.id) {  in bcma_pmu_resources_init()
192 		bcma_debug(bus, "PMU resource config unknown or not needed for device 0x%04X\n",  in bcma_pmu_resources_init()
193 			   bus->chipinfo.id);  in bcma_pmu_resources_init()
212 	struct bcma_bus *bus = cc->core->bus;  in bcma_chipco_bcm4331_ext_pa_lines_ctl()  local
218 		if (bus->chipinfo.pkg == 9 || bus->chipinfo.pkg == 11)  in bcma_chipco_bcm4331_ext_pa_lines_ctl()
220 		else if (bus->chipinfo.rev > 0)  in bcma_chipco_bcm4331_ext_pa_lines_ctl()
232 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu_workarounds()  local
234 	switch (bus->chipinfo.id) {  in bcma_pmu_workarounds()
251 		if (bus->chipinfo.rev == 0) {  in bcma_pmu_workarounds()
265 		bcma_debug(bus, "Workarounds unknown or not needed for device 0x%04X\n",  in bcma_pmu_workarounds()
266 			   bus->chipinfo.id);  in bcma_pmu_workarounds()
277 	bcma_debug(cc->core->bus, "Found rev %u PMU (capabilities 0x%08X)\n",  in bcma_pmu_early_init()
297 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu_get_alp_clock()  local
299 	switch (bus->chipinfo.id) {  in bcma_pmu_get_alp_clock()
330 		bcma_warn(bus, "No ALP clock specified for %04X device, pmu rev. %d, using default %d Hz\n",  in bcma_pmu_get_alp_clock()
331 			  bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK);  in bcma_pmu_get_alp_clock()
342 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu_pll_clock()  local
348 	if (bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||  in bcma_pmu_pll_clock()
349 	    bus->chipinfo.id == BCMA_CHIP_ID_BCM4749) {  in bcma_pmu_pll_clock()
408 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu_get_bus_clock()  local
410 	switch (bus->chipinfo.id) {  in bcma_pmu_get_bus_clock()
430 		bcma_warn(bus, "No bus clock specified for %04X device, pmu rev. %d, using default %d Hz\n",  in bcma_pmu_get_bus_clock()
431 			  bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_HT_CLOCK);  in bcma_pmu_get_bus_clock()
440 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu_get_cpu_clock()  local
442 	if (bus->chipinfo.id == BCMA_CHIP_ID_BCM53572)  in bcma_pmu_get_cpu_clock()
448 		switch (bus->chipinfo.id) {  in bcma_pmu_get_cpu_clock()
485 	struct bcma_bus *bus = cc->core->bus;  in bcma_pmu_spuravoid_pllupdate()  local
487 	switch (bus->chipinfo.id) {  in bcma_pmu_spuravoid_pllupdate()
495 		phypll_offset = (bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||  in bcma_pmu_spuravoid_pllupdate()
496 		       bus->chipinfo.id == BCMA_CHIP_ID_BCM4749 ||  in bcma_pmu_spuravoid_pllupdate()
497 		       bus->chipinfo.id == BCMA_CHIP_ID_BCM53572) ? 6 : 0;  in bcma_pmu_spuravoid_pllupdate()
644 		bcma_err(bus, "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",  in bcma_pmu_spuravoid_pllupdate()
645 			 bus->chipinfo.id);  in bcma_pmu_spuravoid_pllupdate()