484 		writel(PORT_CS_CDB16, port + PORT_CTRL_STAT);  in sil24_dev_config()
486 		writel(PORT_CS_CDB16, port + PORT_CTRL_CLR);  in sil24_dev_config()
523 		writel(val, scr_addr + sil24_scr_map[sc_reg] * 4);  in sil24_scr_write()
535 		writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_STAT);  in sil24_config_port()
537 		writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR);  in sil24_config_port()
548 	writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR);  in sil24_config_port()
551 	writel(PORT_CS_PMP_EN | PORT_CS_PMP_RESUME, port + PORT_CTRL_CLR);  in sil24_config_port()
559 		writel(PORT_CS_PMP_EN, port + PORT_CTRL_STAT);  in sil24_config_pmp()
561 		writel(PORT_CS_PMP_EN, port + PORT_CTRL_CLR);  in sil24_config_pmp()
569 	writel(PORT_CS_PMP_RESUME, port + PORT_CTRL_CLR);  in sil24_clear_pmp()
574 		writel(0, pmp_base + PORT_PMP_STATUS);  in sil24_clear_pmp()
575 		writel(0, pmp_base + PORT_PMP_QACTIVE);  in sil24_clear_pmp()
589 	writel(PORT_CS_INIT, port + PORT_CTRL_STAT);  in sil24_init_port()
621 	writel(PORT_IRQ_COMPLETE | PORT_IRQ_ERROR, port + PORT_IRQ_ENABLE_CLR);  in sil24_exec_polled_cmd()
628 	writel((u32)paddr, port + PORT_CMD_ACTIVATE);  in sil24_exec_polled_cmd()
629 	writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4);  in sil24_exec_polled_cmd()
635 	writel(irq_mask, port + PORT_IRQ_STAT); /* clear IRQs */  in sil24_exec_polled_cmd()
651 	writel(irq_enabled, port + PORT_IRQ_ENABLE_SET);  in sil24_exec_polled_cmd()
719 		writel(PORT_CS_PORT_RST, port + PORT_CTRL_STAT);  in sil24_hardreset()
721 		writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR);  in sil24_hardreset()
740 	writel(PORT_CS_DEV_RST, port + PORT_CTRL_STAT);  in sil24_hardreset()
906 	writel((u32)paddr, activate);  in sil24_qc_issue()
907 	writel((u64)paddr >> 32, activate + 4);  in sil24_qc_issue()
962 	writel(0xffff, port + PORT_IRQ_ENABLE_CLR);  in sil24_freeze()
972 	writel(tmp, port + PORT_IRQ_STAT);  in sil24_thaw()
975 	writel(DEF_PORT_IRQ, port + PORT_IRQ_ENABLE_SET);  in sil24_thaw()
990 	writel(irq_stat, port + PORT_IRQ_STAT);  in sil24_error_intr()
1091 			writel(PORT_CS_PMP_RESUME, port + PORT_CTRL_STAT);  in sil24_error_intr()
1119 		writel(PORT_IRQ_COMPLETE, port + PORT_IRQ_STAT);  in sil24_host_intr()
1235 	writel(0, host_base + HOST_FLASH_CMD);  in sil24_init_controller()
1238 	writel(0, host_base + HOST_CTRL);  in sil24_init_controller()
1247 		writel(0x20c, port + PORT_PHY_CFG);  in sil24_init_controller()
1252 			writel(PORT_CS_PORT_RST, port + PORT_CTRL_CLR);  in sil24_init_controller()
1266 	writel(IRQ_STAT_4PORTS, host_base + HOST_CTRL);  in sil24_init_controller()
1368 		writel(HOST_CTRL_GLOBAL_RST, host_base + HOST_CTRL);  in sil24_pci_device_resume()