366 		unsigned int tmp;  in pdc_sata_port_start()  local
368 		tmp = readl(sata_mmio + PDC_PHYMODE4);  in pdc_sata_port_start()
369 		tmp = (tmp & ~3) | 1;	/* set bits 1:0 = 0:1 */  in pdc_sata_port_start()
370 		writel(tmp, sata_mmio + PDC_PHYMODE4);  in pdc_sata_port_start()
379 	u32 tmp;  in pdc_fpdma_clear_interrupt_flag()  local
381 	tmp = readl(sata_mmio + PDC_FPDMA_CTLSTAT);  in pdc_fpdma_clear_interrupt_flag()
382 	tmp |= PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG;  in pdc_fpdma_clear_interrupt_flag()
383 	tmp |= PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG;  in pdc_fpdma_clear_interrupt_flag()
387 	writeb(tmp >> 8, sata_mmio + PDC_FPDMA_CTLSTAT + 1);  in pdc_fpdma_clear_interrupt_flag()
394 	u8 tmp;  in pdc_fpdma_reset()  local
396 	tmp = (u8)readl(sata_mmio + PDC_FPDMA_CTLSTAT);  in pdc_fpdma_reset()
397 	tmp &= 0x7F;  in pdc_fpdma_reset()
398 	tmp |= PDC_FPDMA_CTLSTAT_RESET;  in pdc_fpdma_reset()
399 	writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT);  in pdc_fpdma_reset()
402 	tmp &= ~PDC_FPDMA_CTLSTAT_RESET;  in pdc_fpdma_reset()
403 	writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT);  in pdc_fpdma_reset()
413 	u32 tmp;  in pdc_not_at_command_packet_phase()  local
418 		tmp = readl(sata_mmio + PDC_INTERNAL_DEBUG_2);  in pdc_not_at_command_packet_phase()
419 		if ((tmp & 0xF) != 1)  in pdc_not_at_command_packet_phase()
437 	u32 tmp;  in pdc_reset_port()  local
442 	tmp = readl(ata_ctlstat_mmio);  in pdc_reset_port()
443 	tmp |= PDC_RESET;  in pdc_reset_port()
444 	writel(tmp, ata_ctlstat_mmio);  in pdc_reset_port()
447 		tmp = readl(ata_ctlstat_mmio);  in pdc_reset_port()
448 		if (tmp & PDC_RESET)  in pdc_reset_port()
453 		tmp |= PDC_RESET;  in pdc_reset_port()
454 		writel(tmp, ata_ctlstat_mmio);  in pdc_reset_port()
457 	tmp &= ~PDC_RESET;  in pdc_reset_port()
458 	writel(tmp, ata_ctlstat_mmio);  in pdc_reset_port()
469 	u8 tmp;  in pdc_pata_cable_detect()  local
472 	tmp = readb(ata_mmio + PDC_CTLSTAT + 3);  in pdc_pata_cable_detect()
473 	if (tmp & 0x01)  in pdc_pata_cable_detect()
719 	u32 tmp;  in pdc_freeze()  local
721 	tmp = readl(ata_mmio + PDC_CTLSTAT);  in pdc_freeze()
722 	tmp |= PDC_IRQ_DISABLE;  in pdc_freeze()
723 	tmp &= ~PDC_DMA_ENABLE;  in pdc_freeze()
724 	writel(tmp, ata_mmio + PDC_CTLSTAT);  in pdc_freeze()
754 	u32 tmp;  in pdc_thaw()  local
760 	tmp = readl(ata_mmio + PDC_CTLSTAT);  in pdc_thaw()
761 	tmp &= ~PDC_IRQ_DISABLE;  in pdc_thaw()
762 	writel(tmp, ata_mmio + PDC_CTLSTAT);  in pdc_thaw()
808 	u8 tmp;  in pdc_hard_reset_port()  local
812 	tmp = readb(pcictl_b1_mmio);  in pdc_hard_reset_port()
813 	tmp &= ~(0x10 << ata_no);  in pdc_hard_reset_port()
814 	writeb(tmp, pcictl_b1_mmio);  in pdc_hard_reset_port()
817 	tmp |= (0x10 << ata_no);  in pdc_hard_reset_port()
818 	writeb(tmp, pcictl_b1_mmio);  in pdc_hard_reset_port()
938 	unsigned int i, tmp;  in pdc_interrupt()  local
990 		tmp = hotplug_status & (0x11 << ata_no);  in pdc_interrupt()
991 		if (tmp) {  in pdc_interrupt()
995 			ata_ehi_push_desc(ehi, "hotplug_status %#x", tmp);  in pdc_interrupt()
1002 		tmp = mask & (1 << (i + 1));  in pdc_interrupt()
1003 		if (tmp) {  in pdc_interrupt()
1133 	u32 tmp;  in pdc_host_init()  local
1147 	tmp = readl(host_mmio + PDC_FLASH_CTL);  in pdc_host_init()
1148 	tmp |= 0x02000;	/* bit 13 (enable bmr burst) */  in pdc_host_init()
1150 		tmp |= 0x10000;	/* bit 16 (fifo threshold at 8 dw) */  in pdc_host_init()
1151 	writel(tmp, host_mmio + PDC_FLASH_CTL);  in pdc_host_init()
1154 	tmp = readl(host_mmio + hotplug_offset);  in pdc_host_init()
1155 	writel(tmp | 0xff, host_mmio + hotplug_offset);  in pdc_host_init()
1157 	tmp = readl(host_mmio + hotplug_offset);  in pdc_host_init()
1159 		writel(tmp & ~0xff0000, host_mmio + hotplug_offset);  in pdc_host_init()
1161 		writel(tmp | 0xff0000, host_mmio + hotplug_offset);  in pdc_host_init()
1168 	tmp = readl(host_mmio + PDC_TBG_MODE);  in pdc_host_init()
1169 	tmp &= ~0x30000; /* clear bit 17, 16*/  in pdc_host_init()
1170 	tmp |= 0x10000;  /* set bit 17:16 = 0:1 */  in pdc_host_init()
1171 	writel(tmp, host_mmio + PDC_TBG_MODE);  in pdc_host_init()
1177 	tmp = readl(host_mmio + PDC_SLEW_CTL);  in pdc_host_init()
1178 	tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */  in pdc_host_init()
1179 	tmp  |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */  in pdc_host_init()
1180 	writel(tmp, host_mmio + PDC_SLEW_CTL);  in pdc_host_init()
1216 		u8 tmp = readb(host_mmio + PDC_FLASH_CTL + 1);  in pdc_ata_init_one()  local
1217 		if (!(tmp & 0x80))  in pdc_ata_init_one()