273 	u8 lane = port_data[sata_port].lane_mapping;  in highbank_cphy_disable_overrides()  local
277 	tmp = combo_phy_read(sata_port, CPHY_RX_INPUT_STS + lane * SPHY_LANE);  in highbank_cphy_disable_overrides()
279 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in highbank_cphy_disable_overrides()
284 	u8 lane = port_data[sata_port].lane_mapping;  in cphy_override_tx_attenuation()  local
290 	tmp = combo_phy_read(sata_port, CPHY_TX_INPUT_STS + lane * SPHY_LANE);  in cphy_override_tx_attenuation()
292 	combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_tx_attenuation()
295 	combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_tx_attenuation()
298 	combo_phy_write(sata_port, CPHY_TX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_tx_attenuation()
303 	u8 lane = port_data[sata_port].lane_mapping;  in cphy_override_rx_mode()  local
305 	tmp = combo_phy_read(sata_port, CPHY_RX_INPUT_STS + lane * SPHY_LANE);  in cphy_override_rx_mode()
307 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
310 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
314 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
317 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
320 	combo_phy_write(sata_port, CPHY_RX_OVERRIDE + lane * SPHY_LANE, tmp);  in cphy_override_rx_mode()
327 	u8 lane = port_data[sata_port].lane_mapping;  in highbank_cphy_override_lane()  local
334 						lane * SPHY_LANE);  in highbank_cphy_override_lane()