Lines Matching defs:sata_dwc_regs
78 struct sata_dwc_regs { struct
79 u32 fptagr; /* 1st party DMA tag */
80 u32 fpbor; /* 1st party DMA buffer offset */
81 u32 fptcr; /* 1st party DMA Xfr count */
82 u32 dmacr; /* DMA Control */
83 u32 dbtsr; /* DMA Burst Transac size */
84 u32 intpr; /* Interrupt Pending */
85 u32 intmr; /* Interrupt Mask */
86 u32 errmr; /* Error Mask */
87 u32 llcr; /* Link Layer Control */
88 u32 phycr; /* PHY Control */
89 u32 physr; /* PHY Status */
90 u32 rxbistpd; /* Recvd BIST pattern def register */
91 u32 rxbistpd1; /* Recvd BIST data dword1 */
92 u32 rxbistpd2; /* Recvd BIST pattern data dword2 */
93 u32 txbistpd; /* Trans BIST pattern def register */
94 u32 txbistpd1; /* Trans BIST data dword1 */
95 u32 txbistpd2; /* Trans BIST data dword2 */
96 u32 bistcr; /* BIST Control Register */
97 u32 bistfctr; /* BIST FIS Count Register */
98 u32 bistsr; /* BIST Status Register */
99 u32 bistdecr; /* BIST Dword Error count register */
100 u32 res[15]; /* Reserved locations */
101 u32 testr; /* Test Register */
102 u32 versionr; /* Version Register */
103 u32 idr; /* ID Register */
104 u32 unimpl[192]; /* Unimplemented */
105 u32 dmadr[256]; /* FIFO Locations in DMA Mode */
150 struct sata_dwc_regs *sata_dwc_regs; /* DW Synopsys SATA specific */ member