Lines Matching refs:mio_boot_dma_cfg
571 union cvmx_mio_boot_dma_cfgx mio_boot_dma_cfg; in octeon_cf_dma_start() local
592 mio_boot_dma_cfg.u64 = 0; in octeon_cf_dma_start()
594 mio_boot_dma_cfg.s.endian = 1; in octeon_cf_dma_start()
596 mio_boot_dma_cfg.s.en = 1; in octeon_cf_dma_start()
597 mio_boot_dma_cfg.s.rw = ((qc->tf.flags & ATA_TFLAG_WRITE) != 0); in octeon_cf_dma_start()
607 mio_boot_dma_cfg.s.clr = 0; in octeon_cf_dma_start()
610 mio_boot_dma_cfg.s.size = sg_dma_len(sg) / 2 - 1; in octeon_cf_dma_start()
613 mio_boot_dma_cfg.s.swap8 = 1; in octeon_cf_dma_start()
615 mio_boot_dma_cfg.s.adr = sg_dma_address(sg); in octeon_cf_dma_start()
618 (mio_boot_dma_cfg.s.rw) ? "write" : "read", sg->length, in octeon_cf_dma_start()
619 (void *)(unsigned long)mio_boot_dma_cfg.s.adr); in octeon_cf_dma_start()
621 cvmx_write_csr(cf_port->dma_base + DMA_CFG, mio_boot_dma_cfg.u64); in octeon_cf_dma_start()