85 	struct smc_config	smc;  member
95 	struct smc_config *smc = &info->smc;  in pata_at32_setup_timing()  local
112 	smc_set_timing(smc, &timing);  in pata_at32_setup_timing()
115 	smc->nrd_setup = smc->nrd_setup + 1;  in pata_at32_setup_timing()
117 	active  = smc->nrd_setup + smc->nrd_pulse;  in pata_at32_setup_timing()
118 	recover = smc->read_cycle - active;  in pata_at32_setup_timing()
122 	  smc->read_cycle = active + 2;  in pata_at32_setup_timing()
125 	smc->ncs_read_setup = 1;  in pata_at32_setup_timing()
126 	smc->ncs_read_pulse = smc->read_cycle - 2;  in pata_at32_setup_timing()
129 	smc->write_cycle = smc->read_cycle;  in pata_at32_setup_timing()
130 	smc->nwe_setup = smc->nrd_setup;  in pata_at32_setup_timing()
131 	smc->nwe_pulse = smc->nrd_pulse;  in pata_at32_setup_timing()
132 	smc->ncs_write_setup = smc->ncs_read_setup;  in pata_at32_setup_timing()
133 	smc->ncs_write_pulse = smc->ncs_read_pulse;  in pata_at32_setup_timing()
140 		smc->read_cycle, smc->nrd_setup, smc->nrd_pulse,  in pata_at32_setup_timing()
141 		smc->ncs_read_setup, smc->ncs_read_pulse);  in pata_at32_setup_timing()
144 	return smc_set_configuration(info->cs, smc);  in pata_at32_setup_timing()
320 	info->smc.bus_width	 = 2; /* 16 bit data bus */  in pata_at32_probe()
321 	info->smc.nrd_controlled = 1; /* Sample data on rising edge of NRD */  in pata_at32_probe()
322 	info->smc.nwe_controlled = 0; /* Drive data on falling edge of NCS */  in pata_at32_probe()
323 	info->smc.nwait_mode	 = 3; /* NWAIT is in READY mode */  in pata_at32_probe()
324 	info->smc.byte_write	 = 0; /* Byte select access type */  in pata_at32_probe()
325 	info->smc.tdf_mode	 = 0; /* TDF optimization disabled */  in pata_at32_probe()
326 	info->smc.tdf_cycles	 = 0; /* No TDF wait cycles */  in pata_at32_probe()