Lines Matching refs:reg_base
94 static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base) in ahci_sunxi_phy_init() argument
100 writel(0, reg_base + AHCI_RWCR); in ahci_sunxi_phy_init()
103 sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19)); in ahci_sunxi_phy_init()
104 sunxi_clrsetbits(reg_base + AHCI_PHYCS0R, in ahci_sunxi_phy_init()
107 sunxi_clrsetbits(reg_base + AHCI_PHYCS1R, in ahci_sunxi_phy_init()
110 sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(28) | BIT(15)); in ahci_sunxi_phy_init()
111 sunxi_clrbits(reg_base + AHCI_PHYCS1R, BIT(19)); in ahci_sunxi_phy_init()
112 sunxi_clrsetbits(reg_base + AHCI_PHYCS0R, in ahci_sunxi_phy_init()
114 sunxi_clrsetbits(reg_base + AHCI_PHYCS2R, in ahci_sunxi_phy_init()
118 sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19)); in ahci_sunxi_phy_init()
122 reg_val = sunxi_getbits(reg_base + AHCI_PHYCS0R, 0x7, 28); in ahci_sunxi_phy_init()
133 sunxi_setbits(reg_base + AHCI_PHYCS2R, (0x1 << 24)); in ahci_sunxi_phy_init()
137 reg_val = sunxi_getbits(reg_base + AHCI_PHYCS2R, 0x1, 24); in ahci_sunxi_phy_init()
150 writel(0x7, reg_base + AHCI_RWCR); in ahci_sunxi_phy_init()