Lines Matching refs:a5
169 s32i a5, a2, PT_AREG5
209 l32i a5, a3, 4
212 __src_b a4, a4, a5 # a4 has the instruction
216 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble
219 _beqi a5, OP0_L32I_N, .Lload # L32I.N, jump
220 addi a6, a5, -OP0_S32I_N
228 .Lstore:movi a5, .Lstore_table # table
230 addx8 a5, a6, a5
231 jx a5 # jump into table
241 l32e a5, a3, -8
244 l32i a5, a3, 0
247 __src_b a3, a5, a6 # a3 has the data word
252 extui a5, a4, INSN_OP0, 4
253 _beqi a5, OP0_L32I_N, 1f # l32i.n: jump
260 extui a5, a4, INSN_OP1, 4
261 _beqi a5, OP1_L32I, 1f # l32i: jump
264 _beqi a5, OP1_L16UI, 1f
265 addi a5, a5, -OP1_L16SI
266 _bnez a5, .Linvalid_instruction_load
277 movi a5, .Lload_table
278 addx8 a4, a4, a5
333 l32i a5, a2, PT_AREG5
354 extui a5, a4, INSN_OP0, 4 # extract OP0
355 addi a5, a5, -OP0_S32I_N
356 _beqz a5, 1f # s32i.n: jump
363 extui a5, a4, INSN_OP1, 4 # extract OP1
364 _beqi a5, OP1_S32I, 1f # jump if 32 bit store
365 _bnei a5, OP1_S16I, .Linvalid_instruction_store
367 movi a5, -1
369 __exth a6, a5 # get 16-bit mask ffffffff:ffff0000
379 movi a5, -1 # mask: ffffffff:XXXX0000
385 __src_b a8, a5, a6 # lo-mask F..F0..0 (BE) 0..0F..F (LE)
386 __src_b a6, a6, a5 # hi-mask 0..0F..F (BE) F..F0..0 (LE)
388 l32e a5, a4, -8
390 l32i a5, a4, 0 # load lower address word
392 and a5, a5, a8 # mask
394 or a5, a5, a8 # or with original value
396 s32e a5, a4, -8
399 s32i a5, a4, 0 # store
402 __sl a5, a3
404 or a6, a6, a5
441 l32i a5, a2, PT_AREG5
462 l32i a5, a2, PT_AREG5