Lines Matching refs:ar
34 .macro __loop_cache_all ar at insn size line_width
36 movi \ar, 0
38 __loopi \ar, \at, \size, (4 << (\line_width))
39 \insn \ar, 0 << (\line_width)
40 \insn \ar, 1 << (\line_width)
41 \insn \ar, 2 << (\line_width)
42 \insn \ar, 3 << (\line_width)
43 __endla \ar, \at, 4 << (\line_width)
48 .macro __loop_cache_range ar as at insn line_width
50 extui \at, \ar, 0, \line_width
53 __loops \ar, \as, \at, \line_width
54 \insn \ar, 0
55 __endla \ar, \at, (1 << (\line_width))
60 .macro __loop_cache_page ar at insn line_width
62 __loopi \ar, \at, PAGE_SIZE, 4 << (\line_width)
63 \insn \ar, 0 << (\line_width)
64 \insn \ar, 1 << (\line_width)
65 \insn \ar, 2 << (\line_width)
66 \insn \ar, 3 << (\line_width)
67 __endla \ar, \at, 4 << (\line_width)
74 .macro ___unlock_dcache_all ar at
77 __loop_cache_all \ar \at diu XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
86 .macro ___unlock_icache_all ar at
88 __loop_cache_all \ar \at iiu XCHAL_ICACHE_SIZE XCHAL_ICACHE_LINEWIDTH
93 .macro ___flush_invalidate_dcache_all ar at
96 __loop_cache_all \ar \at diwbi XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
102 .macro ___flush_dcache_all ar at
105 __loop_cache_all \ar \at diwb XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
111 .macro ___invalidate_dcache_all ar at
114 __loop_cache_all \ar \at dii __stringify(DCACHE_WAY_SIZE) \
121 .macro ___invalidate_icache_all ar at
124 __loop_cache_all \ar \at iii __stringify(ICACHE_WAY_SIZE) \
132 .macro ___flush_invalidate_dcache_range ar as at
135 __loop_cache_range \ar \as \at dhwbi XCHAL_DCACHE_LINEWIDTH
141 .macro ___flush_dcache_range ar as at
144 __loop_cache_range \ar \as \at dhwb XCHAL_DCACHE_LINEWIDTH
150 .macro ___invalidate_dcache_range ar as at
153 __loop_cache_range \ar \as \at dhi XCHAL_DCACHE_LINEWIDTH
159 .macro ___invalidate_icache_range ar as at
162 __loop_cache_range \ar \as \at ihi XCHAL_ICACHE_LINEWIDTH
169 .macro ___flush_invalidate_dcache_page ar as
172 __loop_cache_page \ar \as dhwbi XCHAL_DCACHE_LINEWIDTH
178 .macro ___flush_dcache_page ar as
181 __loop_cache_page \ar \as dhwb XCHAL_DCACHE_LINEWIDTH
187 .macro ___invalidate_dcache_page ar as
190 __loop_cache_page \ar \as dhi XCHAL_DCACHE_LINEWIDTH
196 .macro ___invalidate_icache_page ar as
199 __loop_cache_page \ar \as ihi XCHAL_ICACHE_LINEWIDTH