47 	int reg;  member
48 	void (*init)(struct sim_dev_reg *reg);
49 	void (*read)(struct sim_dev_reg *reg, u32 *value);
50 	void (*write)(struct sim_dev_reg *reg, u32 value);
55 	void (*init)(struct sim_dev_reg *reg);
56 	void (*read)(struct sim_dev_reg *reg, u32 value);
57 	void (*write)(struct sim_dev_reg *reg, u32 value);
68 static void reg_init(struct sim_dev_reg *reg)  in reg_init()  argument
70 	pci_direct_conf1.read(0, 1, reg->dev_func, reg->reg, 4,  in reg_init()
71 			      &reg->sim_reg.value);  in reg_init()
74 static void reg_read(struct sim_dev_reg *reg, u32 *value)  in reg_read()  argument
79 	*value = reg->sim_reg.value;  in reg_read()
83 static void reg_write(struct sim_dev_reg *reg, u32 value)  in reg_write()  argument
88 	reg->sim_reg.value = (value & reg->sim_reg.mask) |  in reg_write()
89 		(reg->sim_reg.value & ~reg->sim_reg.mask);  in reg_write()
93 static void sata_reg_init(struct sim_dev_reg *reg)  in sata_reg_init()  argument
96 			      &reg->sim_reg.value);  in sata_reg_init()
97 	reg->sim_reg.value += 0x400;  in sata_reg_init()
100 static void ehci_reg_read(struct sim_dev_reg *reg, u32 *value)  in ehci_reg_read()  argument
102 	reg_read(reg, value);  in ehci_reg_read()
103 	if (*value != reg->sim_reg.mask)  in ehci_reg_read()
107 void sata_revid_init(struct sim_dev_reg *reg)  in sata_revid_init()  argument
109 	reg->sim_reg.value = 0x01060100;  in sata_revid_init()
110 	reg->sim_reg.mask = 0;  in sata_revid_init()
113 static void sata_revid_read(struct sim_dev_reg *reg, u32 *value)  in sata_revid_read()  argument
115 	reg_read(reg, value);  in sata_revid_read()
118 static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value)  in reg_noirq_read()  argument
124 	*value = reg->sim_reg.value & 0xfff00ff;  in reg_noirq_read()
191 static inline void extract_bytes(u32 *value, int reg, int len)  in extract_bytes()  argument
195 	*value >>= ((reg & 3) * 8);  in extract_bytes()
200 int bridge_read(unsigned int devfn, int reg, int len, u32 *value)  in bridge_read()  argument
205 	switch (reg) {  in bridge_read()
239 		if (reg == PCI_MEMORY_LIMIT)  in bridge_read()
269 			    unsigned int devfn, int reg, int len, u32 *value)  in ce4100_conf_read()  argument
277 			    bus1_fixups[i].reg == (reg & ~3) &&  in ce4100_conf_read()
281 				extract_bytes(value, reg, len);  in ce4100_conf_read()
288 	    !bridge_read(devfn, reg, len, value))  in ce4100_conf_read()
291 	return pci_direct_conf1.read(seg, bus, devfn, reg, len, value);  in ce4100_conf_read()
295 			     unsigned int devfn, int reg, int len, u32 value)  in ce4100_conf_write()  argument
303 			    bus1_fixups[i].reg == (reg & ~3) &&  in ce4100_conf_write()
314 	    ((reg & ~3) == PCI_BASE_ADDRESS_0))  in ce4100_conf_write()
317 	return pci_direct_conf1.write(seg, bus, devfn, reg, len, value);  in ce4100_conf_write()