Lines Matching refs:CTR_BPU_0
83 #define CTR_BPU_0 (1 << 0) macro
93 { CTR_BPU_0, MSR_P4_BPU_PERFCTR0, MSR_P4_BPU_CCCR0 },
129 { { CTR_BPU_0, MSR_P4_BPU_ESCR0},
135 { { CTR_BPU_0, MSR_P4_ITLB_ESCR0},
165 { { CTR_BPU_0, MSR_P4_MOB_ESCR0},
171 { { CTR_BPU_0, MSR_P4_PMH_ESCR0},
177 { { CTR_BPU_0, MSR_P4_BSU_ESCR0},
183 { { CTR_BPU_0, MSR_P4_FSB_ESCR0},
195 { { CTR_BPU_0, MSR_P4_FSB_ESCR0},
201 { { CTR_BPU_0, MSR_P4_BSU_ESCR0},
279 { { CTR_BPU_0, MSR_P4_FSB_ESCR0},