Lines Matching refs:hwc
777 struct hw_perf_event *hwc = &event->hw; in intel_pmu_pebs_enable() local
782 hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT; in intel_pmu_pebs_enable()
785 cpuc->pebs_enabled |= 1ULL << hwc->idx; in intel_pmu_pebs_enable()
788 cpuc->pebs_enabled |= 1ULL << (hwc->idx + 32); in intel_pmu_pebs_enable()
796 if (hwc->flags & PERF_X86_EVENT_FREERUNNING) { in intel_pmu_pebs_enable()
815 if (hwc->flags & PERF_X86_EVENT_AUTO_RELOAD) { in intel_pmu_pebs_enable()
816 ds->pebs_event_reset[hwc->idx] = in intel_pmu_pebs_enable()
817 (u64)(-hwc->sample_period) & x86_pmu.cntval_mask; in intel_pmu_pebs_enable()
827 struct hw_perf_event *hwc = &event->hw; in intel_pmu_pebs_disable() local
835 cpuc->pebs_enabled &= ~(1ULL << hwc->idx); in intel_pmu_pebs_disable()
838 cpuc->pebs_enabled &= ~(1ULL << (hwc->idx + 32)); in intel_pmu_pebs_disable()
848 hwc->config |= ARCH_PERFMON_EVENTSEL_INT; in intel_pmu_pebs_disable()