Lines Matching refs:hwc
73 perf_event_set_period(struct hw_perf_event *hwc, u64 min, u64 max, u64 *hw_period) in perf_event_set_period() argument
75 s64 left = local64_read(&hwc->period_left); in perf_event_set_period()
76 s64 period = hwc->sample_period; in perf_event_set_period()
84 local64_set(&hwc->period_left, left); in perf_event_set_period()
85 hwc->last_period = period; in perf_event_set_period()
91 local64_set(&hwc->period_left, left); in perf_event_set_period()
92 hwc->last_period = period; in perf_event_set_period()
118 struct hw_perf_event *hwc = &event->hw; in perf_event_try_update() local
130 prev_raw_count = local64_read(&hwc->prev_count); in perf_event_try_update()
131 if (local64_cmpxchg(&hwc->prev_count, prev_raw_count, in perf_event_try_update()
147 local64_sub(delta, &hwc->period_left); in perf_event_try_update()
229 struct hw_perf_event *hwc = &event->hw; in perf_ibs_init() local
253 if (hwc->sample_period) { in perf_ibs_init()
257 if (!event->attr.sample_freq && hwc->sample_period & 0x0f) in perf_ibs_init()
264 hwc->sample_period &= ~0x0FULL; in perf_ibs_init()
265 if (!hwc->sample_period) in perf_ibs_init()
266 hwc->sample_period = 0x10; in perf_ibs_init()
271 hwc->sample_period = event->attr.sample_period; in perf_ibs_init()
274 if (!hwc->sample_period) in perf_ibs_init()
281 hwc->last_period = hwc->sample_period; in perf_ibs_init()
282 local64_set(&hwc->period_left, hwc->sample_period); in perf_ibs_init()
284 hwc->config_base = perf_ibs->msr; in perf_ibs_init()
285 hwc->config = config; in perf_ibs_init()
291 struct hw_perf_event *hwc, u64 *period) in perf_ibs_set_period() argument
296 overflow = perf_event_set_period(hwc, 1<<4, perf_ibs->max_period, period); in perf_ibs_set_period()
297 local64_set(&hwc->prev_count, 0); in perf_ibs_set_period()
338 struct hw_perf_event *hwc, u64 config) in perf_ibs_enable_event() argument
340 wrmsrl(hwc->config_base, hwc->config | config | perf_ibs->enable_mask); in perf_ibs_enable_event()
351 struct hw_perf_event *hwc, u64 config) in perf_ibs_disable_event() argument
354 wrmsrl(hwc->config_base, config); in perf_ibs_disable_event()
356 wrmsrl(hwc->config_base, config); in perf_ibs_disable_event()
367 struct hw_perf_event *hwc = &event->hw; in perf_ibs_start() local
372 if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED))) in perf_ibs_start()
375 WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE)); in perf_ibs_start()
376 hwc->state = 0; in perf_ibs_start()
378 perf_ibs_set_period(perf_ibs, hwc, &period); in perf_ibs_start()
380 perf_ibs_enable_event(perf_ibs, hwc, period >> 4); in perf_ibs_start()
387 struct hw_perf_event *hwc = &event->hw; in perf_ibs_stop() local
395 if (!stopping && (hwc->state & PERF_HES_UPTODATE)) in perf_ibs_stop()
398 rdmsrl(hwc->config_base, config); in perf_ibs_stop()
402 perf_ibs_disable_event(perf_ibs, hwc, config); in perf_ibs_stop()
403 WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED); in perf_ibs_stop()
404 hwc->state |= PERF_HES_STOPPED; in perf_ibs_stop()
407 if (hwc->state & PERF_HES_UPTODATE) in perf_ibs_stop()
417 hwc->state |= PERF_HES_UPTODATE; in perf_ibs_stop()
520 struct hw_perf_event *hwc = &event->hw; in perf_ibs_handle_irq() local
539 msr = hwc->config_base; in perf_ibs_handle_irq()
547 perf_sample_data_init(&data, 0, hwc->last_period); in perf_ibs_handle_irq()
548 if (!perf_ibs_set_period(perf_ibs, hwc, &period)) in perf_ibs_handle_irq()
602 perf_ibs_disable_event(perf_ibs, hwc, *config); in perf_ibs_handle_irq()
604 perf_ibs_enable_event(perf_ibs, hwc, period >> 4); in perf_ibs_handle_irq()