Lines Matching refs:h
476 u32 l, h; in intel_init_thermal() local
486 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
488 h = lvtthmr_init; in intel_init_thermal()
499 if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED) in intel_init_thermal()
503 if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) { in intel_init_thermal()
512 rdmsr(MSR_THERM2_CTL, l, h); in intel_init_thermal()
520 h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED; in intel_init_thermal()
521 apic_write(APIC_LVTTHMR, h); in intel_init_thermal()
523 rdmsr(MSR_IA32_THERM_INTERRUPT, l, h); in intel_init_thermal()
527 | THERM_INT_HIGH_ENABLE)) & ~THERM_INT_PLN_ENABLE, h); in intel_init_thermal()
531 | THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h); in intel_init_thermal()
534 l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h); in intel_init_thermal()
537 rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h); in intel_init_thermal()
542 & ~PACKAGE_THERM_INT_PLN_ENABLE, h); in intel_init_thermal()
547 | PACKAGE_THERM_INT_PLN_ENABLE), h); in intel_init_thermal()
551 | PACKAGE_THERM_INT_HIGH_ENABLE), h); in intel_init_thermal()
556 rdmsr(MSR_IA32_MISC_ENABLE, l, h); in intel_init_thermal()
557 wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h); in intel_init_thermal()