32 	unsigned long		rate;  member
38 	.rate		= CLOCK_TICK_RATE,
95 	return clk->rate;  in clk_get_rate()
100 	unsigned long rate;  member
104 	{.rate =  25175000, .cfg = 0x00002001, .div = 0x9},
105 	{.rate =  31500000, .cfg = 0x00002001, .div = 0x7},
106 	{.rate =  40000000, .cfg = 0x00003801, .div = 0x9},
107 	{.rate =  49500000, .cfg = 0x00003801, .div = 0x7},
108 	{.rate =  65000000, .cfg = 0x00002c01, .div = 0x4},
109 	{.rate =  78750000, .cfg = 0x00002400, .div = 0x7},
110 	{.rate = 108000000, .cfg = 0x00002c01, .div = 0x2},
111 	{.rate = 106500000, .cfg = 0x00003c01, .div = 0x3},
112 	{.rate =  50650000, .cfg = 0x00106400, .div = 0x9},
113 	{.rate =  61500000, .cfg = 0x00106400, .div = 0xa},
114 	{.rate =  85500000, .cfg = 0x00002800, .div = 0x6},
136 int clk_set_rate(struct clk *clk, unsigned long rate)  in clk_set_rate()  argument
145 			if (rate == vga_clk_table[i].rate) {  in clk_set_rate()
188 			if (rate == mclk_clk_table[i].mrate) {  in clk_set_rate()
190 				clk_mclk_clk.rate = mclk_clk_table[i].mrate;  in clk_set_rate()
199 		if (clk_mclk_clk.rate)  in clk_set_rate()
200 			clk_bclk32_clk.rate = clk_mclk_clk.rate  in clk_set_rate()
223 		(clk->rate)/1000000, (clk->rate)/10000 % 100);  in clk_register()
238 	unsigned long rate;  member
240 	{.prate = 0x00002001, .rate = 250000000},
241 	{.prate = 0x00104801, .rate = 250000000},
242 	{.prate = 0x00104C01, .rate = 262500000},
243 	{.prate = 0x00002401, .rate = 275000000},
244 	{.prate = 0x00105001, .rate = 275000000},
245 	{.prate = 0x00105401, .rate = 287500000},
246 	{.prate = 0x00002801, .rate = 300000000},
247 	{.prate = 0x00105801, .rate = 300000000},
248 	{.prate = 0x00105C01, .rate = 312500000},
249 	{.prate = 0x00002C01, .rate = 325000000},
250 	{.prate = 0x00106001, .rate = 325000000},
251 	{.prate = 0x00106401, .rate = 337500000},
252 	{.prate = 0x00003001, .rate = 350000000},
253 	{.prate = 0x00106801, .rate = 350000000},
254 	{.prate = 0x00106C01, .rate = 362500000},
255 	{.prate = 0x00003401, .rate = 375000000},
256 	{.prate = 0x00107001, .rate = 375000000},
257 	{.prate = 0x00107401, .rate = 387500000},
258 	{.prate = 0x00003801, .rate = 400000000},
259 	{.prate = 0x00107801, .rate = 400000000},
260 	{.prate = 0x00107C01, .rate = 412500000},
261 	{.prate = 0x00003C01, .rate = 425000000},
262 	{.prate = 0x00108001, .rate = 425000000},
263 	{.prate = 0x00108401, .rate = 437500000},
264 	{.prate = 0x00004001, .rate = 450000000},
265 	{.prate = 0x00108801, .rate = 450000000},
266 	{.prate = 0x00108C01, .rate = 462500000},
267 	{.prate = 0x00004401, .rate = 475000000},
268 	{.prate = 0x00109001, .rate = 475000000},
269 	{.prate = 0x00109401, .rate = 487500000},
270 	{.prate = 0x00004801, .rate = 500000000},
271 	{.prate = 0x00109801, .rate = 500000000},
272 	{.prate = 0x00104C00, .rate = 525000000},
273 	{.prate = 0x00002400, .rate = 550000000},
274 	{.prate = 0x00105000, .rate = 550000000},
275 	{.prate = 0x00105400, .rate = 575000000},
276 	{.prate = 0x00002800, .rate = 600000000},
277 	{.prate = 0x00105800, .rate = 600000000},
278 	{.prate = 0x00105C00, .rate = 625000000},
279 	{.prate = 0x00002C00, .rate = 650000000},
280 	{.prate = 0x00106000, .rate = 650000000},
281 	{.prate = 0x00106400, .rate = 675000000},
282 	{.prate = 0x00003000, .rate = 700000000},
283 	{.prate = 0x00106800, .rate = 700000000},
284 	{.prate = 0x00106C00, .rate = 725000000},
285 	{.prate = 0x00003400, .rate = 750000000},
286 	{.prate = 0x00107000, .rate = 750000000},
287 	{.prate = 0x00107400, .rate = 775000000},
288 	{.prate = 0x00003800, .rate = 800000000},
289 	{.prate = 0x00107800, .rate = 800000000},
290 	{.prate = 0x00107C00, .rate = 825000000},
291 	{.prate = 0x00003C00, .rate = 850000000},
292 	{.prate = 0x00108000, .rate = 850000000},
293 	{.prate = 0x00108400, .rate = 875000000},
294 	{.prate = 0x00004000, .rate = 900000000},
295 	{.prate = 0x00108800, .rate = 900000000},
296 	{.prate = 0x00108C00, .rate = 925000000},
297 	{.prate = 0x00004400, .rate = 950000000},
298 	{.prate = 0x00109000, .rate = 950000000},
299 	{.prate = 0x00109400, .rate = 975000000},
300 	{.prate = 0x00004800, .rate = 1000000000},
301 	{.prate = 0x00109800, .rate = 1000000000},
339 	clk_mclk_clk.rate = 0;  in clk_init()
342 			clk_mclk_clk.rate = pllrate_table[i].rate;  in clk_init()
347 	if (clk_mclk_clk.rate)  in clk_init()
348 		clk_bclk32_clk.rate = clk_mclk_clk.rate /  in clk_init()
354 	clk_ddr_clk.rate = 0;  in clk_init()
357 			clk_ddr_clk.rate = pddr_table[i].drate;  in clk_init()
365 	clk_vga_clk.rate = 0;  in clk_init()
368 			clk_vga_clk.rate = pllrate_table[i].rate;  in clk_init()
373 	if (clk_vga_clk.rate)  in clk_init()
374 		clk_vga_clk.rate = clk_vga_clk.rate /  in clk_init()
380 	clk_ddr_clk.rate = 33000000;  in clk_init()
381 	clk_mclk_clk.rate = 33000000;  in clk_init()
382 	clk_bclk32_clk.rate = 33000000;  in clk_init()