Lines Matching refs:FIELD

135 #define UMAL_CFG1_TXENABLE	FIELD(1, 1, 0)
136 #define UMAL_CFG1_RXENABLE	FIELD(1, 1, 2)
137 #define UMAL_CFG1_TXFLOWCTL	FIELD(1, 1, 4)
138 #define UMAL_CFG1_RXFLOWCTL	FIELD(1, 1, 5)
139 #define UMAL_CFG1_CONFLPBK	FIELD(1, 1, 8)
140 #define UMAL_CFG1_RESET		FIELD(1, 1, 31)
146 #define UMAL_CFG2_FULLDUPLEX	FIELD(1, 1, 0)
147 #define UMAL_CFG2_CRCENABLE	FIELD(1, 1, 1)
148 #define UMAL_CFG2_PADCRC	FIELD(1, 1, 2)
149 #define UMAL_CFG2_LENGTHCHECK	FIELD(1, 1, 4)
151 #define UMAL_CFG2_NIBBLEMODE	FIELD(1, 2, 8)
152 #define UMAL_CFG2_BYTEMODE	FIELD(2, 2, 8)
154 #define UMAL_CFG2_DEFPREAMBLEN	FIELD(7, 4, 12)
168 #define UMAL_IFCTRL_RESET	FIELD(1, 1, 31)
173 #define UMAL_MIICFG_RESET	FIELD(1, 1, 31)
178 #define UMAL_MIICMD_READ	FIELD(1, 1, 0)
183 #define UMAL_MIIIDCT_BUSY	FIELD(1, 1, 0)
184 #define UMAL_MIIIDCT_NOTVALID	FIELD(1, 1, 2)
189 #define UMAL_DMA_Enable		FIELD(1, 1, 0)
194 #define UMAL_DMAIntrMask_ENABLEHALFWORD	FIELD(1, 1, 16)
199 #define CLR_RX_BUS_ERR		FIELD(1, 1, 3)
200 #define CLR_RX_OVERFLOW		FIELD(1, 1, 2)
201 #define CLR_RX_PKT		FIELD(1, 1, 0)
206 #define CLR_TX_BUS_ERR		FIELD(1, 1, 3)
207 #define CLR_TX_UNDERRUN		FIELD(1, 1, 1)
208 #define CLR_TX_PKT		FIELD(1, 1, 0)
213 #define INT_RX_MASK		FIELD(0xd, 4, 4)
214 #define INT_TX_MASK		FIELD(0xb, 4, 0)
216 #define INT_RX_BUS_ERR		FIELD(1, 1, 7)
217 #define INT_RX_OVERFLOW		FIELD(1, 1, 6)
218 #define INT_RX_PKT		FIELD(1, 1, 4)
219 #define INT_TX_BUS_ERR		FIELD(1, 1, 3)
220 #define INT_TX_UNDERRUN		FIELD(1, 1, 1)
221 #define INT_TX_PKT		FIELD(1, 1, 0)
226 #define UMAL_DESC_PACKETSIZE_EMPTY	FIELD(1, 1, 31)
227 #define UMAL_DESC_PACKETSIZE_NONEMPTY	FIELD(0, 1, 31)