151 	int mac;  in tile_pcie_open()  local
215 	for (mac = 0; mac < TILEGX_TRIO_PCIES; mac++) {  in tile_pcie_open()
220 		if (!pcie_ports[trio_index].ports[mac].allow_rc &&  in tile_pcie_open()
221 		    !pcie_ports[trio_index].ports[mac].allow_ep)  in tile_pcie_open()
229 			(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in tile_pcie_open()
242 				pcie_ports[trio_index].ports[mac].allow_ep = 1;  in tile_pcie_open()
312 	int mac = controller->mac;  in trio_handle_level_irq()  local
326 		(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in trio_handle_level_irq()
365 						      irq, controller->mac, i);  in tile_init_irqs()
392 strapped_for_rc(gxio_trio_context_t *trio_context, int mac)  in strapped_for_rc()  argument
403 		(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in strapped_for_rc()
493 				pci_controllers[ctl_index].mac = j;  in tile_pci_init()
564 	int mac;  in fixup_read_and_payload_sizes()  local
567 	mac = controller->mac;  in fixup_read_and_payload_sizes()
575 		(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in fixup_read_and_payload_sizes()
594 		(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in fixup_read_and_payload_sizes()
614 		(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in fixup_read_and_payload_sizes()
622 				    mac);  in fixup_read_and_payload_sizes()
625 		       mac, controller->trio_index);  in fixup_read_and_payload_sizes()
633 	unsigned long mac;  in setup_pcie_rc_delay()  local
647 	mac = simple_strtoul(str, (char **)&str, 10);  in setup_pcie_rc_delay()
648 	if (mac >= TILEGX_TRIO_PCIES)  in setup_pcie_rc_delay()
661 	rc_delay[trio_index][mac] = delay ? : DEFAULT_RC_DELAY;  in setup_pcie_rc_delay()
696 		int mac;  in pcibios_init()  local
703 		mac = controller->mac;  in pcibios_init()
714 			(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in pcibios_init()
720 			if (rc_delay[trio_index][mac]) {  in pcibios_init()
722 					rc_delay[trio_index][mac], mac,  in pcibios_init()
724 				msleep(rc_delay[trio_index][mac] * 1000);  in pcibios_init()
726 			ret = gxio_trio_force_rc_link_up(trio_context, mac);  in pcibios_init()
729 				       mac, trio_index);  in pcibios_init()
733 			i, trio_index, controller->mac);  in pcibios_init()
736 		if (rc_delay[trio_index][mac]) {  in pcibios_init()
738 				rc_delay[trio_index][mac], mac, trio_index);  in pcibios_init()
739 			msleep(rc_delay[trio_index][mac] * 1000);  in pcibios_init()
753 			if (pcie_ports[trio_index].ports[mac].removable) {  in pcibios_init()
755 					mac, trio_index);  in pcibios_init()
759 				       mac, trio_index);  in pcibios_init()
773 			(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in pcibios_init()
790 			(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in pcibios_init()
803 			(mac << TRIO_CFG_REGION_ADDR__MAC_SEL_SHIFT);  in pcibios_init()
818 			(((unsigned long long)mac) <<  in pcibios_init()
827 			       mac, trio_index);  in pcibios_init()
832 		trio_context->pio_cfg_index[mac] = ret;  in pcibios_init()
836 			trio_context->pio_cfg_index[mac],  in pcibios_init()
837 			mac, 0, HV_TRIO_PIO_FLAG_CONFIG_SPACE);  in pcibios_init()
840 			       mac, trio_index);  in pcibios_init()
845 		offset = HV_TRIO_PIO_OFFSET(trio_context->pio_cfg_index[mac]) |  in pcibios_init()
846 			(((unsigned long long)mac) <<  in pcibios_init()
857 		trio_context->mmio_base_pio_cfg[mac] =  in pcibios_init()
860 		if (trio_context->mmio_base_pio_cfg[mac] == NULL) {  in pcibios_init()
862 			       mac, trio_index);  in pcibios_init()
870 				mac, trio_index);  in pcibios_init()
923 			       controller->trio_index, controller->mac);  in pcibios_init()
936 						    controller->mac,  in pcibios_init()
941 			       controller->trio_index, controller->mac);  in pcibios_init()
953 			       controller->trio_index, controller->mac);  in pcibios_init()
966 						    controller->mac,  in pcibios_init()
971 			       controller->trio_index, controller->mac);  in pcibios_init()
991 				       controller->trio_index, controller->mac,  in pcibios_init()
1016 				controller->mac,  in pcibios_init()
1023 				       controller->trio_index, controller->mac,  in pcibios_init()
1238 				(controller->mac <<  in tile_cfg_read()
1279 	mmio_addr = trio_context->mmio_base_pio_cfg[controller->mac] +  in tile_cfg_read()
1364 				(controller->mac <<  in tile_cfg_write()
1405 	mmio_addr = trio_context->mmio_base_pio_cfg[controller->mac] +  in tile_cfg_write()
1564 					KERNEL_PL, irq, controller->mac,  in arch_setup_msi_irq()