Lines Matching refs:default
69 # larger than the default HPAGE_SIZE.
155 default "arch/tile/configs/tilepro_defconfig" if !TILEGX
156 default "arch/tile/configs/tilegx_defconfig" if TILEGX
160 default 3 if 64BIT
161 default 2
173 default "64"
181 default PAGE_SIZE_64KB
220 default y
248 default !TILEGX
251 default. However, the address space of TILE processors is
275 default TILEGX
284 default y
293 default 2
296 By default, 2, i.e. 2^2 == 4 DDR2 controllers.
302 default VMSPLIT_3G
312 tighter. Selecting anything other than the default 3G/1G split
340 default 0xF0000000 if VMSPLIT_3_75G
341 default 0xE0000000 if VMSPLIT_3_5G
342 default 0xB0000000 if VMSPLIT_2_75G
343 default 0xA0000000 if VMSPLIT_2_5G
344 default 0x90000000 if VMSPLIT_2_25G
345 default 0x80000000 if VMSPLIT_2G
346 default 0x40000000 if VMSPLIT_1G
347 default 0xC0000000
355 default n
373 default ""
389 default n
400 default 0x2000000
404 default y
409 default 2 if TILEGX
410 default 1 if !TILEGX
413 at PL2 by default. If running under an older hypervisor,
419 If you're not sure, don't change the default.
429 default y
450 default n
456 by default to save the TRIO PIO Region resource for other purposes.
464 default y