Lines Matching refs:g5
54 LOAD_ITLB_INFO(%g2, %g4, %g5)
55 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_itlb_4v)
77 mov %o2, %g5 ! save %o2
87 mov %g5, %o2 ! restore %o2
100 LOAD_DTLB_INFO(%g2, %g4, %g5)
101 COMPUTE_TAG_TARGET(%g6, %g4, %g5, kvmap_dtlb_4v)
120 mov %o2, %g5 ! save %o2
130 mov %g5, %o2 ! restore %o2
139 ldxa [%g0] ASI_SCRATCHPAD, %g5
141 ldx [%g5 + HV_FAULT_D_ADDR_OFFSET], %g5
157 brz,pn %g5, kvmap_itlb_4v
169 brz,pn %g5, kvmap_dtlb_4v
175 COMPUTE_TSB_PTR(%g1, %g4, PAGE_SHIFT, %g5, %g7)
180 mov SCRATCHPAD_UTSBREG2, %g5
181 ldxa [%g5] ASI_SCRATCHPAD, %g5
182 cmp %g5, -1
185 COMPUTE_TSB_PTR(%g5, %g4, REAL_HPAGE_SHIFT, %g2, %g7)
191 80: stx %g5, [%g2 + TRAP_PER_CPU_TSB_HUGE_TEMP]
252 or %g0, %g4, %g5
263 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5
265 or %g5, %g3, %g5
279 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5
281 or %g5, %g3, %g5
295 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
297 or %g5, %g3, %g5
311 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
313 or %g5, %g3, %g5
332 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g5
344 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
346 or %g5, %g3, %g5
369 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
371 or %g5, %g3, %g5
385 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5
387 or %g5, %g3, %g5