Lines Matching refs:g1
94 rdpr %pstate, %g1
95 andn %g1, PSTATE_AM, %g1
96 wrpr %g1, 0x0, %pstate
318 sethi %hi(prom_root_compatible), %g1
319 or %g1, %lo(prom_root_compatible), %g1
324 ldub [%g1], %g4
330 add %g1, 1, %g1
332 sethi %hi(is_sun4v), %g1
333 or %g1, %lo(is_sun4v), %g1
335 stw %g7, [%g1]
381 sethi %hi(prom_cpu_compatible), %g1
382 or %g1, %lo(prom_cpu_compatible), %g1
387 ldub [%g1], %g4
393 add %g1, 1, %g1
397 89: sethi %hi(prom_cpu_compatible), %g1
398 or %g1, %lo(prom_cpu_compatible), %g1
403 ldub [%g1], %g4
409 add %g1, 1, %g1
411 sethi %hi(prom_cpu_compatible), %g1
412 or %g1, %lo(prom_cpu_compatible), %g1
413 ldub [%g1 + 6], %g2
420 70: ldub [%g1 + 7], %g2
439 91: sethi %hi(prom_cpu_compatible), %g1
440 or %g1, %lo(prom_cpu_compatible), %g1
441 ldub [%g1 + 17], %g2
451 sethi %hi(prom_cpu_compatible), %g1
452 or %g1, %lo(prom_cpu_compatible), %g1
457 ldub [%g1], %g4
463 add %g1, 1, %g1
474 BRANCH_IF_SUN4V(g1, jump_to_sun4u_init)
475 BRANCH_IF_CHEETAH_BASE(g1,g7,cheetah_boot)
476 BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(g1,g7,cheetah_plus_boot)
486 mov DCR_BPE | DCR_RPE | DCR_SI | DCR_IFPOE | DCR_MS, %g1
487 wr %g1, %asr18
517 mov (LSU_CONTROL_IC|LSU_CONTROL_DC|LSU_CONTROL_IM|LSU_CONTROL_DM), %g1
518 stxa %g1, [%g0] ASI_LSU_CONTROL
539 BRANCH_IF_SUN4V(g1, sun4v_init)
564 BRANCH_IF_ANY_CHEETAH(g1, g7, cheetah_tlb_fixup)
570 sethi %hi(tlb_type), %g1
571 stw %g2, [%g1 + %lo(tlb_type)]
574 sethi %hi(sun4v_chip_type), %g1
575 lduw [%g1 + %lo(sun4v_chip_type)], %g1
576 cmp %g1, SUN4V_CHIP_NIAGARA1
578 cmp %g1, SUN4V_CHIP_NIAGARA2
581 cmp %g1, SUN4V_CHIP_NIAGARA3
584 cmp %g1, SUN4V_CHIP_NIAGARA4
587 cmp %g1, SUN4V_CHIP_NIAGARA5
590 cmp %g1, SUN4V_CHIP_SPARC_M6
593 cmp %g1, SUN4V_CHIP_SPARC_M7
642 BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(g1,g7,1f)
646 1: sethi %hi(tlb_type), %g1
647 stw %g2, [%g1 + %lo(tlb_type)]
662 sethi %hi(tlb_type), %g1
663 stw %g2, [%g1 + %lo(tlb_type)]
671 mov 1, %g1
672 sllx %g1, THREAD_SHIFT, %g1
673 sub %g1, (STACKFRAME_SZ + STACK_BIAS), %g1
674 add %g6, %g1, %sp
799 mov PRIMARY_CONTEXT, %g1
801 661: stxa %g2, [%g1] ASI_DMMU
804 stxa %g2, [%g1] ASI_MMU