98 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \  argument
99 661:	casa		[TSB] ASI_N, REG1, REG2; \
102 	casa		[TSB] ASI_PHYS_USE_EC, REG1, REG2; \
105 #define TSB_CAS_TAG(TSB, REG1, REG2) \  argument
106 661:	casxa		[TSB] ASI_N, REG1, REG2; \
109 	casxa		[TSB] ASI_PHYS_USE_EC, REG1, REG2; \
119 #define TSB_LOCK_TAG(TSB, REG1, REG2)	\  argument
120 99:	TSB_LOAD_TAG_HIGH(TSB, REG1);	\
122 	andcc	REG1, REG2, %g0;	\
125 	TSB_CAS_TAG_HIGH(TSB, REG1, REG2);	\
126 	cmp	REG1, REG2;		\
155 #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL)	\  argument
156 	sethi		%hi(swapper_pg_dir), REG1; \
157 	or		REG1, %lo(swapper_pg_dir), REG1; \
161 	ldx		[REG1 + REG2], REG1; \
162 	brz,pn		REG1, FAIL_LABEL; \
166 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
167 	brz,pn		REG1, FAIL_LABEL; \
169 	brz,pn		REG1, FAIL_LABEL; \
171 	andcc		REG1, REG2, %g0; \
178 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
180 	brz,pn		REG1, FAIL_LABEL; \
182 	andcc		REG1, REG2, %g0; \
185 697:	brgez,pn	REG1, FAIL_LABEL; \
186 	 andn		REG1, REG2, REG1; \
189 	 or		REG1, REG2, REG1; \
193 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
194 	brgez,pn	REG1, FAIL_LABEL; \
207 #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
208 	brz,pn		REG1, FAIL_LABEL;		\
211 	andcc		REG1, REG2, %g0;		\
214 	brgez,pn	REG1, FAIL_LABEL;		\
215 	 andn		REG1, REG2, REG1;		\
217 	brlz,pt		REG1, PTE_LABEL;		\
218 	 or		REG1, REG2, REG1;		\
221 #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
222 	brz,pn		REG1, FAIL_LABEL; \
235 #define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL)	\  argument
239 	ldxa		[PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \
240 	brz,pn		REG1, FAIL_LABEL; \
244 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
245 	brz,pn		REG1, FAIL_LABEL; \
249 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
250 	USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \
254 	add		REG1, REG2, REG1; \
255 	ldxa		[REG1] ASI_PHYS_USE_EC, REG1; \
256 	brgez,pn	REG1, FAIL_LABEL; \
265 #define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \  argument
266 	sethi		%hi(prom_trans), REG1; \
267 	or		REG1, %lo(prom_trans), REG1; \
268 97:	ldx		[REG1 + 0x00], REG2; \
271 	ldx		[REG1 + 0x08], REG3; \
277 	 ldx		[REG1 + 0x10], REG3; \
280 	 add		REG3, REG2, REG1; \
282 	 add		REG1, (3 * 8), REG1; \
301 #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \  argument
302 661:	sethi		%uhi(swapper_tsb), REG1; \
304 	or		REG1, %ulo(swapper_tsb), REG1; \
309 	sllx		REG1, 32, REG1; \
310 	or		REG1, REG2, REG1; \
314 	add		REG1, REG2, REG2; \
318 	 mov		REG4, REG1;
324 #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \  argument
325 661:	sethi		%uhi(swapper_4m_tsb), REG1; \
327 	or		REG1, %ulo(swapper_4m_tsb), REG1; \
332 	sllx		REG1, 32, REG1; \
333 	or		REG1, REG2, REG1; \
336 	add		REG1, REG2, REG2; \
340 	 mov		REG4, REG1;