Lines Matching refs:r3
80 mftbu r3
81 cmpw r3,r4
153 lis r3,core99_wake_up@ha
154 addi r3,r3,core99_wake_up@l
155 tophys(r3,r3)
156 stw r3,0x80(r4)
161 lis r3,sleep_storage@ha
162 addi r3,r3,sleep_storage@l
163 stw r5,0(r3)
171 mfmsr r3 /* Save MSR in r7 */
172 rlwinm r3,r3,0,28,26 /* Turn off DR bit */
174 mtmsr r3
180 lis r3,0xfff0
181 lwz r0,0(r3) /* perform cache-inhibited load to ROM */
222 mfspr r3,SPRN_HID0
223 rlwinm r3,r3,0,11,7 /* clear SLEEP, NAP, DOZE bits */
224 rlwinm 3,r3,0,18,15 /* clear DCE, ICE */
225 mtspr SPRN_HID0,r3
230 mfmsr r3
231 ori r3,r3,MSR_EE|MSR_IP
232 xori r3,r3,MSR_EE|MSR_IP
235 mtmsr r3
240 lis r3,sleep_storage@ha
241 addi r3,r3,sleep_storage@l
242 tophys(r3,r3)
243 lwz r1,0(r3)
259 lis r3,0x2000 /* Ku = 1, VSID = 0 */
261 3: mtsrin r3,r4
262 addi r3,r3,0x111 /* increment VSID */
355 lwz r3,SL_MSR(r1)
362 li r3,0
363 mttbl r3
364 lwz r3,SL_TB(r1)
366 mttbu r3
383 mtsrr1 r3