Lines Matching refs:ctx

37 static int spu_hw_mbox_read(struct spu_context *ctx, u32 * data)  in spu_hw_mbox_read()  argument
39 struct spu *spu = ctx->spu; in spu_hw_mbox_read()
54 static u32 spu_hw_mbox_stat_read(struct spu_context *ctx) in spu_hw_mbox_stat_read() argument
56 return in_be32(&ctx->spu->problem->mb_stat_R); in spu_hw_mbox_stat_read()
59 static unsigned int spu_hw_mbox_stat_poll(struct spu_context *ctx, in spu_hw_mbox_stat_poll() argument
62 struct spu *spu = ctx->spu; in spu_hw_mbox_stat_poll()
96 static int spu_hw_ibox_read(struct spu_context *ctx, u32 * data) in spu_hw_ibox_read() argument
98 struct spu *spu = ctx->spu; in spu_hw_ibox_read()
117 static int spu_hw_wbox_write(struct spu_context *ctx, u32 data) in spu_hw_wbox_write() argument
119 struct spu *spu = ctx->spu; in spu_hw_wbox_write()
138 static void spu_hw_signal1_write(struct spu_context *ctx, u32 data) in spu_hw_signal1_write() argument
140 out_be32(&ctx->spu->problem->signal_notify1, data); in spu_hw_signal1_write()
143 static void spu_hw_signal2_write(struct spu_context *ctx, u32 data) in spu_hw_signal2_write() argument
145 out_be32(&ctx->spu->problem->signal_notify2, data); in spu_hw_signal2_write()
148 static void spu_hw_signal1_type_set(struct spu_context *ctx, u64 val) in spu_hw_signal1_type_set() argument
150 struct spu *spu = ctx->spu; in spu_hw_signal1_type_set()
164 static u64 spu_hw_signal1_type_get(struct spu_context *ctx) in spu_hw_signal1_type_get() argument
166 return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 1) != 0); in spu_hw_signal1_type_get()
169 static void spu_hw_signal2_type_set(struct spu_context *ctx, u64 val) in spu_hw_signal2_type_set() argument
171 struct spu *spu = ctx->spu; in spu_hw_signal2_type_set()
185 static u64 spu_hw_signal2_type_get(struct spu_context *ctx) in spu_hw_signal2_type_get() argument
187 return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 2) != 0); in spu_hw_signal2_type_get()
190 static u32 spu_hw_npc_read(struct spu_context *ctx) in spu_hw_npc_read() argument
192 return in_be32(&ctx->spu->problem->spu_npc_RW); in spu_hw_npc_read()
195 static void spu_hw_npc_write(struct spu_context *ctx, u32 val) in spu_hw_npc_write() argument
197 out_be32(&ctx->spu->problem->spu_npc_RW, val); in spu_hw_npc_write()
200 static u32 spu_hw_status_read(struct spu_context *ctx) in spu_hw_status_read() argument
202 return in_be32(&ctx->spu->problem->spu_status_R); in spu_hw_status_read()
205 static char *spu_hw_get_ls(struct spu_context *ctx) in spu_hw_get_ls() argument
207 return ctx->spu->local_store; in spu_hw_get_ls()
210 static void spu_hw_privcntl_write(struct spu_context *ctx, u64 val) in spu_hw_privcntl_write() argument
212 out_be64(&ctx->spu->priv2->spu_privcntl_RW, val); in spu_hw_privcntl_write()
215 static u32 spu_hw_runcntl_read(struct spu_context *ctx) in spu_hw_runcntl_read() argument
217 return in_be32(&ctx->spu->problem->spu_runcntl_RW); in spu_hw_runcntl_read()
220 static void spu_hw_runcntl_write(struct spu_context *ctx, u32 val) in spu_hw_runcntl_write() argument
222 spin_lock_irq(&ctx->spu->register_lock); in spu_hw_runcntl_write()
224 spu_hw_privcntl_write(ctx, in spu_hw_runcntl_write()
226 out_be32(&ctx->spu->problem->spu_runcntl_RW, val); in spu_hw_runcntl_write()
227 spin_unlock_irq(&ctx->spu->register_lock); in spu_hw_runcntl_write()
230 static void spu_hw_runcntl_stop(struct spu_context *ctx) in spu_hw_runcntl_stop() argument
232 spin_lock_irq(&ctx->spu->register_lock); in spu_hw_runcntl_stop()
233 out_be32(&ctx->spu->problem->spu_runcntl_RW, SPU_RUNCNTL_STOP); in spu_hw_runcntl_stop()
234 while (in_be32(&ctx->spu->problem->spu_status_R) & SPU_STATUS_RUNNING) in spu_hw_runcntl_stop()
236 spin_unlock_irq(&ctx->spu->register_lock); in spu_hw_runcntl_stop()
239 static void spu_hw_master_start(struct spu_context *ctx) in spu_hw_master_start() argument
241 struct spu *spu = ctx->spu; in spu_hw_master_start()
250 static void spu_hw_master_stop(struct spu_context *ctx) in spu_hw_master_stop() argument
252 struct spu *spu = ctx->spu; in spu_hw_master_stop()
261 static int spu_hw_set_mfc_query(struct spu_context * ctx, u32 mask, u32 mode) in spu_hw_set_mfc_query() argument
263 struct spu_problem __iomem *prob = ctx->spu->problem; in spu_hw_set_mfc_query()
266 spin_lock_irq(&ctx->spu->register_lock); in spu_hw_set_mfc_query()
274 spin_unlock_irq(&ctx->spu->register_lock); in spu_hw_set_mfc_query()
278 static u32 spu_hw_read_mfc_tagstatus(struct spu_context * ctx) in spu_hw_read_mfc_tagstatus() argument
280 return in_be32(&ctx->spu->problem->dma_tagstatus_R); in spu_hw_read_mfc_tagstatus()
283 static u32 spu_hw_get_mfc_free_elements(struct spu_context *ctx) in spu_hw_get_mfc_free_elements() argument
285 return in_be32(&ctx->spu->problem->dma_qstatus_R); in spu_hw_get_mfc_free_elements()
288 static int spu_hw_send_mfc_command(struct spu_context *ctx, in spu_hw_send_mfc_command() argument
292 struct spu_problem __iomem *prob = ctx->spu->problem; in spu_hw_send_mfc_command()
294 spin_lock_irq(&ctx->spu->register_lock); in spu_hw_send_mfc_command()
302 spin_unlock_irq(&ctx->spu->register_lock); in spu_hw_send_mfc_command()
314 static void spu_hw_restart_dma(struct spu_context *ctx) in spu_hw_restart_dma() argument
316 struct spu_priv2 __iomem *priv2 = ctx->spu->priv2; in spu_hw_restart_dma()
318 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &ctx->spu->flags)) in spu_hw_restart_dma()