Lines Matching refs:i
242 int i, j; in pm_rtas_activate_signals() local
253 i = 0; in pm_rtas_activate_signals()
258 pm_signal_local[i].cpu = node; in pm_rtas_activate_signals()
259 pm_signal_local[i].signal_group in pm_rtas_activate_signals()
261 pm_signal_local[i].bus_word = pm_signal[j].bus_word; in pm_rtas_activate_signals()
262 pm_signal_local[i].sub_unit = pm_signal[j].sub_unit; in pm_rtas_activate_signals()
263 pm_signal_local[i].bit = pm_signal[j].bit; in pm_rtas_activate_signals()
264 i++; in pm_rtas_activate_signals()
268 if (i != 0) { in pm_rtas_activate_signals()
271 i * sizeof(struct pm_signal)); in pm_rtas_activate_signals()
291 int j, i; in set_pm_event() local
353 for (i = 0; i < NUM_DEBUG_BUS_WORDS; i++) { in set_pm_event()
354 if (bus_word & (1 << i)) { in set_pm_event()
356 (bus_type << (30 - (2 * i))); in set_pm_event()
360 input_bus[j] = i; in set_pm_event()
362 (i << (30 - (2 * j))); in set_pm_event()
456 int i, prev_hdw_thread, next_hdw_thread; in cell_virtual_cntr() local
476 for (i = 0; i < NUM_INPUT_BUS_WORDS; i++) in cell_virtual_cntr()
477 input_bus[i] = 0xff; in cell_virtual_cntr()
483 for (i = 0; i < num_counters; i++) in cell_virtual_cntr()
484 set_pm_event(i, in cell_virtual_cntr()
485 pmc_cntrl[next_hdw_thread][i].evnts, in cell_virtual_cntr()
486 pmc_cntrl[next_hdw_thread][i].masks); in cell_virtual_cntr()
502 for (i = 0; i < num_counters; i++) { in cell_virtual_cntr()
503 per_cpu(pmc_values, cpu + prev_hdw_thread)[i] in cell_virtual_cntr()
504 = cbe_read_ctr(cpu, i); in cell_virtual_cntr()
506 if (per_cpu(pmc_values, cpu + next_hdw_thread)[i] in cell_virtual_cntr()
518 cbe_write_ctr(cpu, i, 0xFFFFFFF0); in cell_virtual_cntr()
520 cbe_write_ctr(cpu, i, in cell_virtual_cntr()
523 next_hdw_thread)[i]); in cell_virtual_cntr()
531 for (i = 0; i < num_counters; i++) { in cell_virtual_cntr()
532 if (pmc_cntrl[next_hdw_thread][i].enabled) { in cell_virtual_cntr()
538 enable_ctr(cpu, i, in cell_virtual_cntr()
541 cbe_write_pm07_control(cpu, i, 0); in cell_virtual_cntr()
692 int i; in cell_reg_setup_spu_events() local
752 for (i=0; i < MAX_NUMNODES * NUM_SPUS_PER_NODE; i++) in cell_reg_setup_spu_events()
753 spu_pm_cnt[i] = reset_value[0]; in cell_reg_setup_spu_events()
762 int i, j, cpu; in cell_reg_setup_ppu() local
777 for (i = 0; i < num_ctrs; ++i) { in cell_reg_setup_ppu()
779 pmc_cntrl[0][i].evnts = ctr[i].event; in cell_reg_setup_ppu()
780 pmc_cntrl[0][i].masks = ctr[i].unit_mask; in cell_reg_setup_ppu()
781 pmc_cntrl[0][i].enabled = ctr[i].enabled; in cell_reg_setup_ppu()
782 pmc_cntrl[0][i].vcntr = i; in cell_reg_setup_ppu()
785 per_cpu(pmc_values, j)[i] = 0; in cell_reg_setup_ppu()
792 for (i = 0; i < num_ctrs; ++i) { in cell_reg_setup_ppu()
793 if ((ctr[i].event >= 2100) && (ctr[i].event <= 2111)) in cell_reg_setup_ppu()
794 pmc_cntrl[1][i].evnts = ctr[i].event + 19; in cell_reg_setup_ppu()
795 else if (ctr[i].event == 2203) in cell_reg_setup_ppu()
796 pmc_cntrl[1][i].evnts = ctr[i].event; in cell_reg_setup_ppu()
797 else if ((ctr[i].event >= 2200) && (ctr[i].event <= 2215)) in cell_reg_setup_ppu()
798 pmc_cntrl[1][i].evnts = ctr[i].event + 16; in cell_reg_setup_ppu()
800 pmc_cntrl[1][i].evnts = ctr[i].event; in cell_reg_setup_ppu()
802 pmc_cntrl[1][i].masks = ctr[i].unit_mask; in cell_reg_setup_ppu()
803 pmc_cntrl[1][i].enabled = ctr[i].enabled; in cell_reg_setup_ppu()
804 pmc_cntrl[1][i].vcntr = i; in cell_reg_setup_ppu()
807 for (i = 0; i < NUM_INPUT_BUS_WORDS; i++) in cell_reg_setup_ppu()
808 input_bus[i] = 0xff; in cell_reg_setup_ppu()
817 for (i = 0; i < num_counters; ++i) { in cell_reg_setup_ppu()
819 if (pmc_cntrl[0][i].enabled) { in cell_reg_setup_ppu()
821 reset_value[i] = 0xFFFFFFFF - ctr[i].count; in cell_reg_setup_ppu()
822 set_pm_event(i, in cell_reg_setup_ppu()
823 pmc_cntrl[0][i].evnts, in cell_reg_setup_ppu()
824 pmc_cntrl[0][i].masks); in cell_reg_setup_ppu()
827 ctr_enabled |= (1 << i); in cell_reg_setup_ppu()
833 for (i = 0; i < num_counters; ++i) { in cell_reg_setup_ppu()
834 per_cpu(pmc_values, cpu)[i] = reset_value[i]; in cell_reg_setup_ppu()
904 int i; in cell_cpu_setup() local
929 for (i = 0; i < num_counters; ++i) { in cell_cpu_setup()
930 if (ctr_enabled & (1 << i)) { in cell_cpu_setup()
1086 int ret, i; in pm_rtas_activate_spu_profiling() local
1093 for (i = 0; i < ARRAY_SIZE(pm_signal_local); i++) { in pm_rtas_activate_spu_profiling()
1094 pm_signal_local[i].cpu = node; in pm_rtas_activate_spu_profiling()
1095 pm_signal_local[i].signal_group = 41; in pm_rtas_activate_spu_profiling()
1097 pm_signal_local[i].bus_word = 1 << i / 2; in pm_rtas_activate_spu_profiling()
1099 pm_signal_local[i].sub_unit = i; in pm_rtas_activate_spu_profiling()
1100 pm_signal_local[i].bit = 63; in pm_rtas_activate_spu_profiling()
1404 u32 cpu, i; in cell_global_start_ppu() local
1417 for (i = 0; i < num_counters; ++i) { in cell_global_start_ppu()
1418 if (ctr_enabled & (1 << i)) { in cell_global_start_ppu()
1419 cbe_write_ctr(cpu, i, reset_value[i]); in cell_global_start_ppu()
1420 enable_ctr(cpu, i, pm_regs.pm07_cntrl); in cell_global_start_ppu()
1421 interrupt_mask |= CBE_PM_CTR_OVERFLOW_INTR(i); in cell_global_start_ppu()
1424 cbe_write_pm07_control(cpu, i, 0); in cell_global_start_ppu()
1612 int i; in cell_handle_interrupt_ppu() local
1644 for (i = 0; i < num_counters; ++i) { in cell_handle_interrupt_ppu()
1645 if ((interrupt_mask & CBE_PM_CTR_OVERFLOW_INTR(i)) in cell_handle_interrupt_ppu()
1646 && ctr[i].enabled) { in cell_handle_interrupt_ppu()
1647 oprofile_add_ext_sample(pc, regs, i, is_kernel); in cell_handle_interrupt_ppu()
1648 cbe_write_ctr(cpu, i, reset_value[i]); in cell_handle_interrupt_ppu()