186 	union dw_union vc, va, vb;  in do_spe_mathemu()  local
203 	vc.wp[0] = current->thread.evr[fc];  in do_spe_mathemu()
204 	vc.wp[1] = regs->gpr[fc];  in do_spe_mathemu()
213 	pr_debug("vc: %08x  %08x\n", vc.wp[0], vc.wp[1]);  in do_spe_mathemu()
238 			vc.wp[1] = va.wp[1] & ~SIGN_BIT_S;  in do_spe_mathemu()
242 			vc.wp[1] = va.wp[1] | SIGN_BIT_S;  in do_spe_mathemu()
246 			vc.wp[1] = va.wp[1] ^ SIGN_BIT_S;  in do_spe_mathemu()
280 				vc.wp[1] = 0;  in do_spe_mathemu()
284 				FP_TO_INT_ROUND_S(vc.wp[1], SB, 32,  in do_spe_mathemu()
304 				vc.wp[1] = 0;  in do_spe_mathemu()
307 				FP_TO_INT_ROUND_S(vc.wp[1], SB, 32,  in do_spe_mathemu()
315 				vc.wp[1] = 0;  in do_spe_mathemu()
318 				FP_TO_INT_S(vc.wp[1], SB, 32,  in do_spe_mathemu()
331 		FP_PACK_SP(vc.wp + 1, SR);  in do_spe_mathemu()
368 			vc.dp[0] = va.dp[0] & ~SIGN_BIT_D;  in do_spe_mathemu()
372 			vc.dp[0] = va.dp[0] | SIGN_BIT_D;  in do_spe_mathemu()
376 			vc.dp[0] = va.dp[0] ^ SIGN_BIT_D;  in do_spe_mathemu()
410 				vc.wp[1] = 0;  in do_spe_mathemu()
414 				FP_TO_INT_ROUND_D(vc.wp[1], DB, 32,  in do_spe_mathemu()
434 				vc.dp[0] = 0;  in do_spe_mathemu()
437 				FP_TO_INT_D(vc.dp[0], DB, 64,  in do_spe_mathemu()
445 				vc.wp[1] = 0;  in do_spe_mathemu()
448 				FP_TO_INT_ROUND_D(vc.wp[1], DB, 32,  in do_spe_mathemu()
456 				vc.wp[1] = 0;  in do_spe_mathemu()
459 				FP_TO_INT_D(vc.wp[1], DB, 32,  in do_spe_mathemu()
473 		FP_PACK_DP(vc.dp, DR);  in do_spe_mathemu()
520 			vc.wp[0] = va.wp[0] & ~SIGN_BIT_S;  in do_spe_mathemu()
521 			vc.wp[1] = va.wp[1] & ~SIGN_BIT_S;  in do_spe_mathemu()
525 			vc.wp[0] = va.wp[0] | SIGN_BIT_S;  in do_spe_mathemu()
526 			vc.wp[1] = va.wp[1] | SIGN_BIT_S;  in do_spe_mathemu()
530 			vc.wp[0] = va.wp[0] ^ SIGN_BIT_S;  in do_spe_mathemu()
531 			vc.wp[1] = va.wp[1] ^ SIGN_BIT_S;  in do_spe_mathemu()
569 				vc.wp[0] = 0;  in do_spe_mathemu()
573 				FP_TO_INT_ROUND_S(vc.wp[0], SB0, 32,  in do_spe_mathemu()
577 				vc.wp[1] = 0;  in do_spe_mathemu()
581 				FP_TO_INT_ROUND_S(vc.wp[1], SB1, 32,  in do_spe_mathemu()
589 				vc.wp[0] = 0;  in do_spe_mathemu()
592 				FP_TO_INT_ROUND_S(vc.wp[0], SB0, 32,  in do_spe_mathemu()
596 				vc.wp[1] = 0;  in do_spe_mathemu()
599 				FP_TO_INT_ROUND_S(vc.wp[1], SB1, 32,  in do_spe_mathemu()
607 				vc.wp[0] = 0;  in do_spe_mathemu()
610 				FP_TO_INT_S(vc.wp[0], SB0, 32,  in do_spe_mathemu()
614 				vc.wp[1] = 0;  in do_spe_mathemu()
617 				FP_TO_INT_S(vc.wp[1], SB1, 32,  in do_spe_mathemu()
633 		FP_PACK_SP(vc.wp, SR0);  in do_spe_mathemu()
634 		FP_PACK_SP(vc.wp + 1, SR1);  in do_spe_mathemu()
685 	current->thread.evr[fc] = vc.wp[0];  in do_spe_mathemu()
686 	regs->gpr[fc] = vc.wp[1];  in do_spe_mathemu()
691 	pr_debug("vc: %08x  %08x\n", vc.wp[0], vc.wp[1]);  in do_spe_mathemu()