129 static inline void write_IRQreg_idr(struct openpic *opp, int n_IRQ,
282 static inline void IRQ_setbit(struct irq_queue *q, int n_IRQ)  in IRQ_setbit()  argument
284 	set_bit(n_IRQ, q->queue);  in IRQ_setbit()
287 static inline void IRQ_resetbit(struct irq_queue *q, int n_IRQ)  in IRQ_resetbit()  argument
289 	clear_bit(n_IRQ, q->queue);  in IRQ_resetbit()
324 static void IRQ_local_pipe(struct openpic *opp, int n_CPU, int n_IRQ,  in IRQ_local_pipe()  argument
332 	src = &opp->src[n_IRQ];  in IRQ_local_pipe()
335 		__func__, n_IRQ, active, was_active);  in IRQ_local_pipe()
339 			__func__, src->output, n_IRQ, active, was_active,  in IRQ_local_pipe()
350 					__func__, src->output, n_CPU, n_IRQ);  in IRQ_local_pipe()
357 					__func__, src->output, n_CPU, n_IRQ);  in IRQ_local_pipe()
371 		IRQ_setbit(&dst->raised, n_IRQ);  in IRQ_local_pipe()
373 		IRQ_resetbit(&dst->raised, n_IRQ);  in IRQ_local_pipe()
379 			__func__, n_IRQ, priority, dst->ctpr, n_CPU);  in IRQ_local_pipe()
387 				__func__, n_IRQ, dst->servicing.next, n_CPU);  in IRQ_local_pipe()
390 				__func__, n_CPU, n_IRQ, dst->raised.next);  in IRQ_local_pipe()
398 				__func__, n_IRQ, dst->raised.next,  in IRQ_local_pipe()
404 				__func__, n_IRQ, dst->ctpr,  in IRQ_local_pipe()
412 static void openpic_update_irq(struct openpic *opp, int n_IRQ)  in openpic_update_irq()  argument
418 	src = &opp->src[n_IRQ];  in openpic_update_irq()
423 		pr_debug("%s: IRQ %d is disabled\n", __func__, n_IRQ);  in openpic_update_irq()
434 		pr_debug("%s: IRQ %d is already inactive\n", __func__, n_IRQ);  in openpic_update_irq()
445 		pr_debug("%s: IRQ %d has no target\n", __func__, n_IRQ);  in openpic_update_irq()
451 		IRQ_local_pipe(opp, src->last_cpu, n_IRQ, active, was_active);  in openpic_update_irq()
456 				IRQ_local_pipe(opp, i, n_IRQ, active,  in openpic_update_irq()
467 				IRQ_local_pipe(opp, i, n_IRQ, active,  in openpic_update_irq()
476 static void openpic_set_irq(void *opaque, int n_IRQ, int level)  in openpic_set_irq()  argument
481 	if (n_IRQ >= MAX_IRQ) {  in openpic_set_irq()
482 		WARN_ONCE(1, "%s: IRQ %d out of range\n", __func__, n_IRQ);  in openpic_set_irq()
486 	src = &opp->src[n_IRQ];  in openpic_set_irq()
488 		n_IRQ, level, src->ivpr);  in openpic_set_irq()
492 		openpic_update_irq(opp, n_IRQ);  in openpic_set_irq()
497 			openpic_update_irq(opp, n_IRQ);  in openpic_set_irq()
508 			openpic_update_irq(opp, n_IRQ);  in openpic_set_irq()
562 static inline uint32_t read_IRQreg_idr(struct openpic *opp, int n_IRQ)  in read_IRQreg_idr()  argument
564 	return opp->src[n_IRQ].idr;  in read_IRQreg_idr()
567 static inline uint32_t read_IRQreg_ilr(struct openpic *opp, int n_IRQ)  in read_IRQreg_ilr()  argument
570 		return opp->src[n_IRQ].output;  in read_IRQreg_ilr()
575 static inline uint32_t read_IRQreg_ivpr(struct openpic *opp, int n_IRQ)  in read_IRQreg_ivpr()  argument
577 	return opp->src[n_IRQ].ivpr;  in read_IRQreg_ivpr()
580 static inline void write_IRQreg_idr(struct openpic *opp, int n_IRQ,  in write_IRQreg_idr()  argument
583 	struct irq_source *src = &opp->src[n_IRQ];  in write_IRQreg_idr()
596 	pr_debug("Set IDR %d to 0x%08x\n", n_IRQ, src->idr);  in write_IRQreg_idr()
625 static inline void write_IRQreg_ilr(struct openpic *opp, int n_IRQ,  in write_IRQreg_ilr()  argument
629 		struct irq_source *src = &opp->src[n_IRQ];  in write_IRQreg_ilr()
632 		pr_debug("Set ILR %d to 0x%08x, output %d\n", n_IRQ, src->idr,  in write_IRQreg_ilr()
639 static inline void write_IRQreg_ivpr(struct openpic *opp, int n_IRQ,  in write_IRQreg_ivpr()  argument
651 	opp->src[n_IRQ].ivpr =  in write_IRQreg_ivpr()
652 	    (opp->src[n_IRQ].ivpr & IVPR_ACTIVITY_MASK) | (val & mask);  in write_IRQreg_ivpr()
658 	switch (opp->src[n_IRQ].type) {  in write_IRQreg_ivpr()
660 		opp->src[n_IRQ].level =  in write_IRQreg_ivpr()
661 		    !!(opp->src[n_IRQ].ivpr & IVPR_SENSE_MASK);  in write_IRQreg_ivpr()
665 		opp->src[n_IRQ].ivpr &= ~IVPR_SENSE_MASK;  in write_IRQreg_ivpr()
669 		opp->src[n_IRQ].ivpr &= ~(IVPR_POLARITY_MASK | IVPR_SENSE_MASK);  in write_IRQreg_ivpr()
673 	openpic_update_irq(opp, n_IRQ);  in write_IRQreg_ivpr()
674 	pr_debug("Set IVPR %d to 0x%08x -> 0x%08x\n", n_IRQ, val,  in write_IRQreg_ivpr()
675 		opp->src[n_IRQ].ivpr);  in write_IRQreg_ivpr()
1030 	int s_IRQ, n_IRQ;  in openpic_cpu_write_internal()  local
1096 		n_IRQ = IRQ_get_next(opp, &dst->raised);  in openpic_cpu_write_internal()
1097 		src = &opp->src[n_IRQ];  in openpic_cpu_write_internal()
1098 		if (n_IRQ != -1 &&  in openpic_cpu_write_internal()
1102 				idx, n_IRQ);  in openpic_cpu_write_internal()