Lines Matching refs:std
49 std r0, PPC_LR_STKOFF(r1)
337 std r6, HSTATE_DSCR(r13)
366 std r0, HSTATE_KVM_VCPU(r13)
374 std r0, HSTATE_KVM_VCORE(r13)
460 std r0, HSTATE_SCRATCH0(r13)
491 std r0, PPC_LR_STKOFF(r1)
495 std r1, HSTATE_HOST_R1(r13)
639 std r5,HSTATE_PURR(r13)
640 std r6,HSTATE_SPURR(r13)
727 std r2, PACATMSCRATCH(r13) /* Save TOC */
1108 std r9, HSTATE_SCRATCH2(r13)
1126 std r0, VCPU_GPR(R0)(r9)
1127 std r1, VCPU_GPR(R1)(r9)
1128 std r2, VCPU_GPR(R2)(r9)
1129 std r3, VCPU_GPR(R3)(r9)
1130 std r4, VCPU_GPR(R4)(r9)
1131 std r5, VCPU_GPR(R5)(r9)
1132 std r6, VCPU_GPR(R6)(r9)
1133 std r7, VCPU_GPR(R7)(r9)
1134 std r8, VCPU_GPR(R8)(r9)
1136 std r0, VCPU_GPR(R9)(r9)
1137 std r10, VCPU_GPR(R10)(r9)
1138 std r11, VCPU_GPR(R11)(r9)
1141 std r3, VCPU_GPR(R12)(r9)
1145 std r3, VCPU_CFAR(r9)
1149 std r4, VCPU_PPR(r9)
1158 std r10, VCPU_SRR0(r9)
1159 std r11, VCPU_SRR1(r9)
1165 1: std r10, VCPU_PC(r9)
1166 std r11, VCPU_MSR(r9)
1170 std r3, VCPU_GPR(R13)(r9)
1171 std r4, VCPU_LR(r9)
1197 std r3, VCPU_CTR(r9)
1198 std r4, VCPU_XER(r9)
1248 std r6, VCPU_DAR(r9)
1253 std r6, VCPU_FAULT_DAR(r9)
1297 std r8,VCPU_SLB_E(r7)
1298 std r3,VCPU_SLB_V(r7)
1312 std r5,VCPU_PURR(r9)
1313 std r6,VCPU_SPURR(r9)
1337 std r5,VCPU_DEC_EXPIRES(r9)
1346 std r5, VCPU_IAMR(r9)
1348 std r7, VCPU_FSCR(r9)
1352 std r5, VCPU_IC(r9)
1353 std r6, VCPU_VTB(r9)
1354 std r7, VCPU_TAR(r9)
1356 std r8, VCPU_EBBHR(r9)
1361 std r5, VCPU_EBBRR(r9)
1362 std r6, VCPU_BESCR(r9)
1363 std r7, VCPU_CSIGR(r9)
1364 std r8, VCPU_TACR(r9)
1369 std r5, VCPU_TCSCR(r9)
1370 std r6, VCPU_ACOP(r9)
1372 std r8, VCPU_WORT(r9)
1392 std r5,VCPU_AMR(r9)
1393 std r6,VCPU_UAMOR(r9)
1400 std r8, VCPU_DSCR(r9)
1404 std r14, VCPU_GPR(R14)(r9)
1405 std r15, VCPU_GPR(R15)(r9)
1406 std r16, VCPU_GPR(R16)(r9)
1407 std r17, VCPU_GPR(R17)(r9)
1408 std r18, VCPU_GPR(R18)(r9)
1409 std r19, VCPU_GPR(R19)(r9)
1410 std r20, VCPU_GPR(R20)(r9)
1411 std r21, VCPU_GPR(R21)(r9)
1412 std r22, VCPU_GPR(R22)(r9)
1413 std r23, VCPU_GPR(R23)(r9)
1414 std r24, VCPU_GPR(R24)(r9)
1415 std r25, VCPU_GPR(R25)(r9)
1416 std r26, VCPU_GPR(R26)(r9)
1417 std r27, VCPU_GPR(R27)(r9)
1418 std r28, VCPU_GPR(R28)(r9)
1419 std r29, VCPU_GPR(R29)(r9)
1420 std r30, VCPU_GPR(R30)(r9)
1421 std r31, VCPU_GPR(R31)(r9)
1428 std r3, VCPU_SPRG0(r9)
1429 std r4, VCPU_SPRG1(r9)
1430 std r5, VCPU_SPRG2(r9)
1431 std r6, VCPU_SPRG3(r9)
1463 std r9, PACATMSCRATCH(r13)
1467 std r29, VCPU_GPRS_TM(29)(r9)
1468 std r30, VCPU_GPRS_TM(30)(r9)
1469 std r31, VCPU_GPRS_TM(31)(r9)
1482 std reg, VCPU_GPRS_TM(reg)(r9)
1488 std r4, VCPU_GPRS_TM(13)(r9)
1491 std r4, VCPU_GPRS_TM(9)(r9)
1502 std r31, VCPU_PPR_TM(r9)
1503 std r30, VCPU_DSCR_TM(r9)
1509 std r5, VCPU_LR_TM(r9)
1511 std r7, VCPU_CTR_TM(r9)
1512 std r8, VCPU_AMR_TM(r9)
1513 std r10, VCPU_TAR_TM(r9)
1535 std r5, VCPU_TFHAR(r9)
1536 std r6, VCPU_TFIAR(r9)
1537 std r7, VCPU_TEXASR(r9)
1591 std r3, VCPU_MMCR(r9) /* if not, set saved MMCR0 to FC */
1596 std r4, VCPU_MMCR(r9)
1597 std r5, VCPU_MMCR + 8(r9)
1598 std r6, VCPU_MMCR + 16(r9)
1600 std r10, VCPU_MMCR + 24(r9)
1602 std r7, VCPU_SIAR(r9)
1603 std r8, VCPU_SDAR(r9)
1621 std r5, VCPU_SIER(r9)
1624 std r8, VCPU_MMCR + 32(r9)
1680 std r7, VCORE_DPDES(r5)
1768 4: std r4, VCPU_FAULT_DAR(r9)
1913 std r3,VCPU_GPR(R3)(r4)
2156 std r4,VCPU_DABR(r3)
2172 std r4, VCPU_DAWR(r3)
2173 std r5, VCPU_DAWRX(r3)
2181 std r11,VCPU_MSR(r3)
2191 std r0,VCPU_GPR(R3)(r3)
2226 std r14, VCPU_GPR(R14)(r3)
2227 std r15, VCPU_GPR(R15)(r3)
2228 std r16, VCPU_GPR(R16)(r3)
2229 std r17, VCPU_GPR(R17)(r3)
2230 std r18, VCPU_GPR(R18)(r3)
2231 std r19, VCPU_GPR(R19)(r3)
2232 std r20, VCPU_GPR(R20)(r3)
2233 std r21, VCPU_GPR(R21)(r3)
2234 std r22, VCPU_GPR(R22)(r3)
2235 std r23, VCPU_GPR(R23)(r3)
2236 std r24, VCPU_GPR(R24)(r3)
2237 std r25, VCPU_GPR(R25)(r3)
2238 std r26, VCPU_GPR(R26)(r3)
2239 std r27, VCPU_GPR(R27)(r3)
2240 std r28, VCPU_GPR(R28)(r3)
2241 std r29, VCPU_GPR(R29)(r3)
2242 std r30, VCPU_GPR(R30)(r3)
2243 std r31, VCPU_GPR(R31)(r3)
2267 std r3, VCPU_DEC_EXPIRES(r4)
2299 std r0, HSTATE_SCRATCH0(r13)
2688 std r3, VCPU_CUR_ACTIVITY(r4)
2689 std r5, VCPU_ACTIVITY_START(r4)
2704 std r3, VCPU_CUR_ACTIVITY(r4)
2707 std r7, VCPU_ACTIVITY_START(r4)
2714 std r8, TAS_SEQCOUNT(r5)
2718 std r7, TAS_TOTAL(r5)
2724 3: std r3, TAS_MIN(r5)
2727 std r3, TAS_MAX(r5)
2730 std r8, TAS_SEQCOUNT(r5)