Lines Matching refs:r11
968 ld r11, VCPU_MSR(r4)
976 rldicl r11, r11, 63 - MSR_HV_LG, 1
977 rotldi r11, r11, 1 + MSR_HV_LG
978 ori r11, r11, MSR_ME
984 andi. r8, r11, MSR_EE
1000 mtspr SPRN_SRR1, r11
1016 mtspr SPRN_HSRR1,r11
1052 ld r11, VCPU_GPR(R11)(r4)
1138 std r11, VCPU_GPR(R11)(r9)
1157 mfspr r11, SPRN_SRR1
1159 std r11, VCPU_SRR1(r9)
1163 mfspr r11, SPRN_HSRR1
1166 std r11, VCPU_MSR(r9)
1762 andi. r0, r11, MSR_DR /* data relocation enabled? */
1777 ld r11, VCPU_MSR(r9)
1793 mtspr SPRN_SRR1, r11
1836 andis. r0, r11, SRR1_ISI_NOPT@h
1838 andi. r0, r11, MSR_IR /* instruction relocation enabled? */
1848 mr r6, r11
1853 ld r11, VCPU_MSR(r9)
1861 mr r11, r3
1864 mtspr SPRN_SRR1, r11
1884 andi. r0,r11,MSR_PR
1915 ld r11,VCPU_MSR(r4)
1920 mtspr SPRN_SRR1,r11
2180 ori r11,r11,MSR_EE
2181 std r11,VCPU_MSR(r3)
2420 ld r11, VCPU_MSR(r9)
2421 andi. r10, r11, MSR_RI /* check for unrecoverable exception */
2648 rldicl r0, r11, 64 - MSR_TS_S_LG, 62
2650 ld r11, VCPU_INTR_MSR(r9)
2654 1: rldimi r11, r0, MSR_TS_S_LG, 63 - MSR_TS_T_LG