Lines Matching refs:r3
47 addi r11,r3,THREAD_INFO_GAP
48 stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
49 mr r1,r3
85 cmpwi cr1,r3,0
94 mr r10,r3
95 mullw r9,r3,r5
96 mulhwu r3,r3,r5
102 addze r3,r3
104 addze r3,r3
117 subf r3,r5,r3
142 add r0,r0,r3
158 addis r4,r3,cur_cpu_spec@ha
161 add r4,r4,r3
164 add r5,r5,r3
182 cmplwi cr0,r3,0
194 rlwinm r5,r3,16,15,15 /* Clear out HID1:PS from value read */
207 cmplwi cr0,r3,0
229 insrwi r4,r3,1,9 /* insert parameter into bit 9 */
247 andc r0,r0,r3 /* And off the bits set in r3 (first parm) */
267 lbz r3,0(r3)
285 stb r3,0(r4)
306 li r3, 512
307 mtctr r3
313 lis r3, KERNELBASE@h
314 iccci 0,r3
318 mfspr r3,SPRN_L1CSR0
319 ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC
321 mtspr SPRN_L1CSR0,r3
325 mfspr r3,SPRN_L1CSR1
326 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
327 mtspr SPRN_L1CSR1,r3
329 mfspr r3,SPRN_PVR
330 rlwinm r3,r3,16,16,31
331 cmpwi 0,r3,1
334 mfspr r3,SPRN_HID0
335 ori r3,r3,HID0_ICFI
336 mtspr SPRN_HID0,r3
354 andc r3,r3,r5
355 subf r4,r3,r4
360 mr r6,r3
361 1: dcbst 0,r3
362 addi r3,r3,L1_CACHE_BYTES
388 andc r3,r3,r5
389 subf r4,r3,r4
395 1: dcbst 0,r3
396 addi r3,r3,L1_CACHE_BYTES
409 andc r3,r3,r5
410 subf r4,r3,r4
416 1: dcbf 0,r3
417 addi r3,r3,L1_CACHE_BYTES
431 andc r3,r3,r5
432 subf r4,r3,r4
438 1: dcbi 0,r3
439 addi r3,r3,L1_CACHE_BYTES
457 rlwinm r3,r3,0,0,31-PAGE_SHIFT /* Get page base address */
460 mr r6,r3
461 0: dcbst 0,r3 /* Write line to ram */
462 addi r3,r3,L1_CACHE_BYTES
503 rlwinm r3,r3,0,0,31-PAGE_SHIFT /* Get page base address */
506 mr r6,r3
507 0: dcbst 0,r3 /* Write line to ram */
508 addi r3,r3,L1_CACHE_BYTES
532 1: dcbz 0,r3
533 addi r3,r3,L1_CACHE_BYTES
548 stw r6,4(r3); \
549 stw r7,8(r3); \
550 stw r8,12(r3); \
551 stwu r9,16(r3)
554 addi r3,r3,-4
576 dcbz r5,r3
616 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
618 sraw r7,r3,r7 # t2 = MSW >> (count-32)
621 sraw r3,r3,r5 # MSW = MSW >> count
627 slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
631 or r3,r3,r6 # MSW |= t1
633 or r3,r3,r7 # MSW |= t2
640 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
641 srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
643 srw r3,r3,r5 # MSW = MSW >> count
652 cmpw r3,r5
653 li r3,1
657 1: li r3,0
659 li r3,2
666 cmplw r3,r5
667 li r3,1
671 1: li r3,0
673 li r3,2
678 rotlwi r10,r3,8
680 rlwimi r10,r3,24,0,7
682 rlwimi r10,r3,24,16,23
683 mr r3,r9
688 srawi r4,r3,31
689 xor r3,r3,r4
690 sub r3,r3,r4
698 li r3,0
699 stw r3,0(r1) /* Zero the stack frame pointer */
722 mr r29, r3
730 mr r3, r29
738 mr r29, r3
744 mfspr r3,SPRN_PVR
745 srwi r3,r3,16
746 cmplwi cr0,r3,PVR_476@h
748 cmplwi cr0,r3,PVR_476_ISS@h
772 li r3, 0
773 mtspr SPRN_PID, r3
777 oris r3,r3,PPC44x_MMUCR_STS@h
779 mtspr SPRN_MMUCR,r3
790 li r3,0 /* Set PAGEID inval value */
793 tlbwe r3,r4,PPC44x_TLB_PAGEID /* If not, inval the entry */
809 tlbre r3, r23, PPC44x_TLB_PAGEID
818 rlwinm r11, r3, 0, 24, 27 /* bits 24-27 */
838 insrwi r3, r7, 1, 23 /* Bit 23 is TS for PAGEID field */
841 tlbwe r3, r24, PPC44x_TLB_PAGEID
862 li r3, 0
863 tlbwe r3, r23, PPC44x_TLB_PAGEID
876 rotlwi r3, r8, 28 /* Create EPN (bits 0-3) */
877 mr r4, r3 /* RPN = EPN */
878 ori r3, r3, (PPC44x_TLB_VALID | PPC44x_TLB_256M) /* SIZE = 256M, Valid */
879 insrwi r3, r7, 1, 23 /* Set TS from r7 */
881 tlbwe r3, r6, PPC44x_TLB_PAGEID /* PageID field : EPN, V, SIZE */
908 li r3, 0
909 tlbwe r3, r24, PPC44x_TLB_PAGEID
923 li r3, 0
924 mtspr SPRN_PID, r3 /* Set PID */
928 oris r3, r3, PPC47x_MMUCR_STS@h /* Set STS=1 */
929 1: mtspr SPRN_MMUCR, r3 /* Put MMUCR */
948 addis r3, 0, 0x8000 /* specify the way */
958 tlbwe r4, r3, 0
959 tlbwe r5, r3, 1
960 tlbwe r5, r3, 2
961 addis r3, r3, 0x2000 /* Increment the way */
962 cmpwi r3, 0
964 addis r3, 0, 0x8000
980 lis r3, 0x8000 /* Way '0' */
982 tlbwe r24, r3, 0
983 tlbwe r25, r3, 1
984 tlbwe r26, r3, 2
1002 li r3, 0
1020 tlbwe r4, r3, 0 /* Write out the entries */
1021 tlbwe r5, r3, 1
1022 tlbwe r6, r3, 2
1070 lis r3, 0x8000 /* Way '0' */
1073 tlbwe r24, r3, 0
1074 tlbwe r25, r3, 1
1075 tlbwe r26, r3, 2
1086 mr r3, r29
1119 mr r0, r3
1123 lwzu r0, 4(r3)
1137 rlwinm r3, r0, 0, 0, 19 /* clear kexec flags, page align */
1138 subi r3, r3, 4
1177 mfspr r3, SPRN_PIR /* current core we are running on */